dbr_addr          977 drivers/infiniband/hw/mlx5/cq.c 	MLX5_SET64(cqc, cqc, dbr_addr, cq->db.dma);
dbr_addr         1268 drivers/infiniband/hw/mlx5/qp.c 	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
dbr_addr         1358 drivers/infiniband/hw/mlx5/qp.c 	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
dbr_addr         2249 drivers/infiniband/hw/mlx5/qp.c 	MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma);
dbr_addr         5972 drivers/infiniband/hw/mlx5/qp.c 	MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma);
dbr_addr           37 drivers/infiniband/hw/mlx5/srq_cmd.c 	MLX5_SET64(wq, wq, dbr_addr,	  in->db_record);
dbr_addr           50 drivers/infiniband/hw/mlx5/srq_cmd.c 	MLX5_SET64(srqc, srqc, dbr_addr,      in->db_record);
dbr_addr           65 drivers/infiniband/hw/mlx5/srq_cmd.c 	in->db_record	  = MLX5_GET64(wq, wq, dbr_addr);
dbr_addr           78 drivers/infiniband/hw/mlx5/srq_cmd.c 	in->db_record	  = MLX5_GET64(srqc, srqc, dbr_addr);
dbr_addr          700 drivers/net/ethernet/mellanox/mlx5/core/en_main.c 	MLX5_SET64(wq, wq,  dbr_addr,		rq->wq_ctrl.db.dma);
dbr_addr         1238 drivers/net/ethernet/mellanox/mlx5/core/en_main.c 	MLX5_SET64(wq, wq, dbr_addr,      csp->wq_ctrl->db.dma);
dbr_addr         1632 drivers/net/ethernet/mellanox/mlx5/core/en_main.c 	MLX5_SET64(cqc, cqc, dbr_addr,      cq->wq_ctrl.db.dma);
dbr_addr          478 drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c 	MLX5_SET64(cqc, cqc, dbr_addr, conn->cq.wq_ctrl.db.dma);
dbr_addr          596 drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c 	MLX5_SET64(qpc, qpc, dbr_addr, conn->qp.wq_ctrl.db.dma);
dbr_addr          701 drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c 	MLX5_SET64(qpc, qpc, dbr_addr, conn->qp.wq_ctrl.db.dma);
dbr_addr          176 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c 	MLX5_SET64(qpc, qpc, dbr_addr, dr_qp->wq_ctrl.db.dma);
dbr_addr          753 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c 	MLX5_SET64(cqc, cqc, dbr_addr, cq->wq_ctrl.db.dma);
dbr_addr          763 drivers/staging/most/dim2/hal.c 	ch->dbr_addr = alloc_dbr(ch->dbr_size);
dbr_addr          764 drivers/staging/most/dim2/hal.c 	if (ch->dbr_addr >= DBR_SIZE)
dbr_addr          770 drivers/staging/most/dim2/hal.c 			       ch->dbr_addr, ch->dbr_size, 0);
dbr_addr          845 drivers/staging/most/dim2/hal.c 	ch->dbr_addr = alloc_dbr(ch->dbr_size);
dbr_addr          846 drivers/staging/most/dim2/hal.c 	if (ch->dbr_addr >= DBR_SIZE)
dbr_addr          851 drivers/staging/most/dim2/hal.c 	dim2_configure_channel(ch->addr, CAT_CT_VAL_ISOC, is_tx, ch->dbr_addr,
dbr_addr          873 drivers/staging/most/dim2/hal.c 	ch->dbr_addr = alloc_dbr(ch->dbr_size);
dbr_addr          874 drivers/staging/most/dim2/hal.c 	if (ch->dbr_addr >= DBR_SIZE)
dbr_addr          879 drivers/staging/most/dim2/hal.c 	dim2_clear_dbr(ch->dbr_addr, ch->dbr_size);
dbr_addr          881 drivers/staging/most/dim2/hal.c 			       ch->dbr_addr, ch->dbr_size, 0);
dbr_addr          897 drivers/staging/most/dim2/hal.c 	if (ch->dbr_addr < DBR_SIZE)
dbr_addr          898 drivers/staging/most/dim2/hal.c 		free_dbr(ch->dbr_addr, ch->dbr_size);
dbr_addr          899 drivers/staging/most/dim2/hal.c 	ch->dbr_addr = DBR_SIZE;
dbr_addr           50 drivers/staging/most/dim2/hal.h 	u16 dbr_addr;
dbr_addr         1614 include/linux/mlx5/mlx5_ifc.h 	u8         dbr_addr[0x40];
dbr_addr         2693 include/linux/mlx5/mlx5_ifc.h 	u8         dbr_addr[0x40];
dbr_addr         3020 include/linux/mlx5/mlx5_ifc.h 	u8         dbr_addr[0x40];
dbr_addr         3574 include/linux/mlx5/mlx5_ifc.h 	u8         dbr_addr[0x40];