DPP_TOP0_DPP_CONTROL  330 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	TF_SF(DPP_TOP0_DPP_CONTROL, DPP_CLOCK_ENABLE, mask_sh), \
DPP_TOP0_DPP_CONTROL  436 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	TF_SF(DPP_TOP0_DPP_CONTROL, DPPCLK_RATE_CONTROL, mask_sh)