DPP_CLOCK_ENABLE 725 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h type DPP_CLOCK_ENABLE; \ DPP_CLOCK_ENABLE 100 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c DPP_CLOCK_ENABLE, &s->is_enabled); DPP_CLOCK_ENABLE 513 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c DPP_CLOCK_ENABLE, 1); DPP_CLOCK_ENABLE 515 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c REG_UPDATE(DPP_CONTROL, DPP_CLOCK_ENABLE, 1); DPP_CLOCK_ENABLE 517 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c REG_UPDATE(DPP_CONTROL, DPP_CLOCK_ENABLE, 0); DPP_CLOCK_ENABLE 330 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h TF_SF(DPP_TOP0_DPP_CONTROL, DPP_CLOCK_ENABLE, mask_sh), \ DPP_CLOCK_ENABLE 1081 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h type DPP_CLOCK_ENABLE; \ DPP_CLOCK_ENABLE 57 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c DPP_CLOCK_ENABLE, &s->is_enabled);