DPPCLK             33 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
DPPCLK             34 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
DPPCLK             35 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
DPPCLK             36 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
DPPCLK             41 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SRII(DTO_PARAM, DPPCLK, 4),\
DPPCLK             42 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SRII(DTO_PARAM, DPPCLK, 5)
DPPCLK             51 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
DPPCLK             52 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
DPPCLK             53 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
DPPCLK             54 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
DPPCLK             55 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 2, mask_sh),\
DPPCLK             56 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
DPPCLK             57 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 3, mask_sh),\
DPPCLK             58 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 3, mask_sh),\
DPPCLK             66 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 4, mask_sh),\
DPPCLK             67 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 4, mask_sh),\
DPPCLK             68 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 5, mask_sh),\
DPPCLK             69 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 5, mask_sh)
DPPCLK             57 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 		double DPPCLK,
DPPCLK            440 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 		double DPPCLK,
DPPCLK            527 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 	if (DPPCLK == 0.0 || DISPCLK == 0.0)
DPPCLK            530 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 	*DSTXAfterScaler = DPPCycles * PixelClock / DPPCLK + DISPCLKCycles * PixelClock / DISPCLK
DPPCLK            546 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 	TotalRepeaterDelayTime = MaxInterDCNTileRepeaters * (2.0 / DPPCLK + 3.0 / DISPCLK);
DPPCLK            547 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 	*VUpdateWidthPix = (14.0 / DCFCLKDeepSleep + 12.0 / DPPCLK + TotalRepeaterDelayTime)
DPPCLK            551 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			150.0 / DPPCLK,
DPPCLK            552 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			TotalRepeaterDelayTime + 20.0 / DCFCLKDeepSleep + 10.0 / DPPCLK)
DPPCLK           1432 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 							/ mode_lib->vba.DPPCLK[k];
DPPCLK           1456 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 							/ mode_lib->vba.DPPCLK[k];
DPPCLK           1713 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 												* mode_lib->vba.DPPCLK[k]
DPPCLK           1736 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 													* mode_lib->vba.DPPCLK[k]
DPPCLK           2092 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 							mode_lib->vba.DPPCLK[k],
DPPCLK           2349 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 							/ mode_lib->vba.DPPCLK[k];
DPPCLK           2364 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 								/ mode_lib->vba.DPPCLK[k];
DPPCLK           5082 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			locals->DPPCLK[k] = locals->RequiredDPPCLK[mode_lib->vba.VoltageLevel][MaximumMPCCombine][k];
DPPCLK             62 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 		double DPPCLK,
DPPCLK             91 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 		double DPPCLK,
DPPCLK            469 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 		double DPPCLK,
DPPCLK            518 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 	if (DPPCLK == 0.0 || DISPCLK == 0.0)
DPPCLK            521 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 	*DSTXAfterScaler = DPPCycles * PixelClock / DPPCLK + DISPCLKCycles * PixelClock / DISPCLK
DPPCLK            541 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 		double DPPCLK,
DPPCLK            608 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 	TotalRepeaterDelayTime = MaxInterDCNTileRepeaters * (2.0 / DPPCLK + 3.0 / DISPCLK);
DPPCLK            609 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 	*VUpdateWidthPix = (14.0 / DCFCLKDeepSleep + 12.0 / DPPCLK + TotalRepeaterDelayTime)
DPPCLK            613 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			150.0 / DPPCLK,
DPPCLK            614 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			TotalRepeaterDelayTime + 20.0 / DCFCLKDeepSleep + 10.0 / DPPCLK)
DPPCLK           1489 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 								/ mode_lib->vba.DPPCLK[k];
DPPCLK           1503 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 								/ mode_lib->vba.DPPCLK[k];
DPPCLK           1748 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 												* mode_lib->vba.DPPCLK[k]
DPPCLK           1771 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 													* mode_lib->vba.DPPCLK[k]
DPPCLK           2127 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 					mode_lib->vba.DPPCLK[k], mode_lib->vba.DISPCLK, mode_lib->vba.PixelClock[k], mode_lib->vba.DSCDelay[k], mode_lib->vba.DPPPerPlane[k], mode_lib->vba.ScalerEnabled[k], mode_lib->vba.NumberOfCursors[k],
DPPCLK           2136 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 							mode_lib->vba.DPPCLK[k],
DPPCLK           2382 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 							/ mode_lib->vba.DPPCLK[k];
DPPCLK           2397 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 								/ mode_lib->vba.DPPCLK[k];
DPPCLK           5113 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			locals->DPPCLK[k] = locals->RequiredDPPCLK[mode_lib->vba.VoltageLevel][MaximumMPCCombine][k];
DPPCLK             43 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 	double DPPCLK;
DPPCLK            311 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		double DPPCLK[],
DPPCLK            353 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		double DPPCLK[],
DPPCLK            397 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		double                 DPPCLK[],
DPPCLK            736 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 	if (myPipe->DPPCLK == 0.0 || myPipe->DISPCLK == 0.0)
DPPCLK            739 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 	*DSTXAfterScaler = DPPCycles * myPipe->PixelClock / myPipe->DPPCLK
DPPCLK            755 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 	TotalRepeaterDelayTime = MaxInterDCNTileRepeaters * (2.0 / myPipe->DPPCLK + 3.0 / myPipe->DISPCLK);
DPPCLK            756 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 	*VUpdateWidthPix = (14.0 / myPipe->DCFCLKDeepSleep + 12.0 / myPipe->DPPCLK + TotalRepeaterDelayTime)
DPPCLK            760 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			150.0 / myPipe->DPPCLK,
DPPCLK            761 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			TotalRepeaterDelayTime + 20.0 / myPipe->DCFCLKDeepSleep + 10.0 / myPipe->DPPCLK)
DPPCLK           1758 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		locals->DPPCLK,
DPPCLK           2134 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			myPipe.DPPCLK = locals->DPPCLK[k];
DPPCLK           2437 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 				locals->DPPCLK,
DPPCLK           2483 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		locals->DPPCLK,
DPPCLK           4685 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 					myPipe.DPPCLK = locals->RequiredDPPCLK[i][j][k];
DPPCLK           5184 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			locals->DPPCLK[k] = locals->RequiredDPPCLK[mode_lib->vba.VoltageLevel][MaximumMPCCombine][k];
DPPCLK           5235 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		double DPPCLK[],
DPPCLK           5504 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		double DPPCLK[],
DPPCLK           5518 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 					/ DPPCLK[k];
DPPCLK           5528 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 						/ PSCL_THROUGHPUT_CHROMA[k] / DPPCLK[k];
DPPCLK           5710 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 		double DPPCLK[],
DPPCLK           5735 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 					/ PSCL_THROUGHPUT[k] / DPPCLK[k];
DPPCLK           5746 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 						/ PSCL_THROUGHPUT_CHROMA[k] / DPPCLK[k];
DPPCLK           5755 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 					/ PSCL_THROUGHPUT[k] / DPPCLK[k];
DPPCLK           5767 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 						swath_width_chroma_ub[k] / PSCL_THROUGHPUT_CHROMA[k] / DPPCLK[k];
DPPCLK            507 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c 		mode_lib->vba.DPPCLK[mode_lib->vba.NumberOfActivePlanes] = clks->dppclk_mhz;
DPPCLK            707 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double DPPCLK[DC__NUM_DPP__MAX];