DPG_PIPE_URGENT_LEVEL_CONTROL 190 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_SET_2(DPG_PIPE_URGENT_LEVEL_CONTROL, 0, DPG_PIPE_URGENT_LEVEL_CONTROL 109 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h uint32_t DPG_PIPE_URGENT_LEVEL_CONTROL; DPG_PIPE_URGENT_LEVEL_CONTROL 218 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, DPG_PIPE_URGENT_LEVEL_CONTROL, URGENT_LEVEL_LOW_WATERMARK, mask_sh),\ DPG_PIPE_URGENT_LEVEL_CONTROL 219 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, DPG_PIPE_URGENT_LEVEL_CONTROL, URGENT_LEVEL_HIGH_WATERMARK, mask_sh),\