DPG_PIPE_STUTTER_CONTROL2  237 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c 	if (REG(DPG_PIPE_STUTTER_CONTROL2))
DPG_PIPE_STUTTER_CONTROL2  238 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c 		REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL2,
DPG_PIPE_STUTTER_CONTROL2  255 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c 	if (REG(DPG_PIPE_STUTTER_CONTROL2))
DPG_PIPE_STUTTER_CONTROL2  256 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c 		REG_UPDATE(DPG_PIPE_STUTTER_CONTROL2,
DPG_PIPE_STUTTER_CONTROL2   77 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SRI(DPG_PIPE_STUTTER_CONTROL2, DMIF_PG, id),\
DPG_PIPE_STUTTER_CONTROL2  113 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	uint32_t DPG_PIPE_STUTTER_CONTROL2;
DPG_PIPE_STUTTER_CONTROL2  216 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SFB(blk, DPG_PIPE_STUTTER_CONTROL2, STUTTER_EXIT_SELF_REFRESH_WATERMARK, mask_sh),\
DPG_PIPE_STUTTER_CONTROL2  217 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SFB(blk, DPG_PIPE_STUTTER_CONTROL2, STUTTER_ENTER_SELF_REFRESH_WATERMARK, mask_sh),\