DPG0_DPG_CONTROL 63 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h OPP_SF(DPG0_DPG_CONTROL, DPG_EN, mask_sh), \ DPG0_DPG_CONTROL 64 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h OPP_SF(DPG0_DPG_CONTROL, DPG_MODE, mask_sh), \ DPG0_DPG_CONTROL 65 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h OPP_SF(DPG0_DPG_CONTROL, DPG_DYNAMIC_RANGE, mask_sh), \ DPG0_DPG_CONTROL 66 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h OPP_SF(DPG0_DPG_CONTROL, DPG_BIT_DEPTH, mask_sh), \ DPG0_DPG_CONTROL 67 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h OPP_SF(DPG0_DPG_CONTROL, DPG_VRES, mask_sh), \ DPG0_DPG_CONTROL 68 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h OPP_SF(DPG0_DPG_CONTROL, DPG_HRES, mask_sh), \