data_return_bus_width  158 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h 	DC_LOG_BANDWIDTH_CALCS("	[bw_fixed] data_return_bus_width: %d", bw_fixed_to_int(vbios->data_return_bus_width));
data_return_bus_width 1188 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->dmif_burst_time[i][j] = bw_max3(data->dmif_total_page_close_open_time, bw_div(data->total_display_reads_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))), bw_div(data->total_display_reads_required_data, (bw_mul(bw_mul(sclk[j], vbios->data_return_bus_width), bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100)))));
data_return_bus_width 1190 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->mcifwr_burst_time[i][j] = bw_max3(data->mcifwr_total_page_close_open_time, bw_div(data->total_display_writes_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_wrchannels)))), bw_div(data->total_display_writes_required_data, (bw_mul(sclk[j], vbios->data_return_bus_width))));
data_return_bus_width 1568 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->dmif_required_sclk = bw_div(bw_div(data->total_display_reads_required_data, data->display_reads_time_for_data_transfer), (bw_mul(vbios->data_return_bus_width, bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100))));
data_return_bus_width 1569 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->mcifwr_required_sclk = bw_div(bw_div(data->total_display_writes_required_data, data->display_writes_time_for_data_transfer), vbios->data_return_bus_width);
data_return_bus_width 1582 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[low]),vbios->data_return_bus_width))
data_return_bus_width 1588 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[mid]),vbios->data_return_bus_width))
data_return_bus_width 1594 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid2]),vbios->data_return_bus_width))
data_return_bus_width 1600 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid3]),vbios->data_return_bus_width))
data_return_bus_width 1606 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid4]),vbios->data_return_bus_width))
data_return_bus_width 1612 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid5]),vbios->data_return_bus_width))
data_return_bus_width 1618 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid6]),vbios->data_return_bus_width))
data_return_bus_width 1624 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_high]),vbios->data_return_bus_width))
data_return_bus_width 1630 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		else if (bw_meq(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_high]),vbios->data_return_bus_width))
data_return_bus_width 1947 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->stutter_burst_time = bw_div(bw_int_to_fixed(data->total_stutter_dmif_buffer_size), bw_mul(sclk[data->sclk_level], vbios->data_return_bus_width));
data_return_bus_width 1999 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->dmif_required_sclk_for_urgent_latency[i] = bw_div(bw_div(data->total_display_reads_required_data, data->display_reads_time_for_data_transfer_and_urgent_latency), (bw_mul(vbios->data_return_bus_width, bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100))));
data_return_bus_width 2063 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.data_return_bus_width = bw_int_to_fixed(32);
data_return_bus_width 2179 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.data_return_bus_width = bw_int_to_fixed(32);
data_return_bus_width 2292 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.data_return_bus_width = bw_int_to_fixed(32);
data_return_bus_width 2408 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.data_return_bus_width = bw_int_to_fixed(32);
data_return_bus_width 2524 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.data_return_bus_width = bw_int_to_fixed(32);
data_return_bus_width 2637 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		vbios.data_return_bus_width = bw_int_to_fixed(32);
data_return_bus_width  214 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h 	struct bw_fixed data_return_bus_width;