dar                40 arch/mips/include/asm/txx9/tx3927.h 		volatile unsigned long dar;
dar                80 arch/powerpc/include/asm/emulated_ops.h 			1, regs, regs->dar);				\
dar               971 arch/powerpc/include/asm/kvm_ppc.h SHARED_SPRNG_WRAPPER(dar, 64, SPRN_GDEAR)
dar                22 arch/powerpc/include/asm/pnv-ocxl.h extern void pnv_ocxl_unmap_xsl_regs(void __iomem *dsisr, void __iomem *dar,
dar                25 arch/powerpc/include/asm/pnv-ocxl.h 				void __iomem **dar, void __iomem **tfc,
dar                45 arch/powerpc/include/asm/ptrace.h 			unsigned long dar;
dar                47 arch/powerpc/include/uapi/asm/kvm_para.h 	__u64 dar;		/* dear on BookE */
dar                55 arch/powerpc/include/uapi/asm/ptrace.h 	unsigned long dar;		/* Fault registers */
dar               123 arch/powerpc/kernel/align.c 	addr = (unsigned char __user *)regs->dar;
dar               316 arch/powerpc/kernel/asm-offsets.c 	STACK_PT_REGS_OFFSET(_DAR, dar);
dar               328 arch/powerpc/kernel/asm-offsets.c 	STACK_PT_REGS_OFFSET(_DEAR, dar);
dar               511 arch/powerpc/kernel/asm-offsets.c 	OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
dar               256 arch/powerpc/kernel/hw_breakpoint.c 	unsigned long dar = regs->dar;
dar               295 arch/powerpc/kernel/hw_breakpoint.c 	if (!((bp->attr.bp_addr <= dar) &&
dar               296 arch/powerpc/kernel/hw_breakpoint.c 	      (dar - bp->attr.bp_addr < bp->attr.bp_len)))
dar               452 arch/powerpc/kernel/kvm.c 		kvm_patch_ins_ld(inst, magic_var(dar), inst_rt);
dar               555 arch/powerpc/kernel/kvm.c 		kvm_patch_ins_std(inst, magic_var(dar), inst_rt);
dar               552 arch/powerpc/kernel/mce_power.c 			*addr = regs->dar;
dar                26 arch/powerpc/kernel/ppc32.h 	unsigned int dar;		/* Fault registers */
dar              1406 arch/powerpc/kernel/process.c 		pr_cont("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr);
dar              1408 arch/powerpc/kernel/process.c 		pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr);
dar               122 arch/powerpc/kernel/ptrace.c 	REG_OFFSET_NAME(dar),
dar              3393 arch/powerpc/kernel/ptrace.c 	BUILD_BUG_ON(offsetof(struct pt_regs, dar) !=
dar              3394 arch/powerpc/kernel/ptrace.c 		     offsetof(struct user_pt_regs, dar));
dar               355 arch/powerpc/kernel/signal_64.c 	err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
dar               480 arch/powerpc/kernel/signal_64.c 	err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
dar              1623 arch/powerpc/kernel/traps.c 		_exception(sig, regs, code, regs->dar);
dar              1625 arch/powerpc/kernel/traps.c 		bad_page_fault(regs, regs->dar, sig);
dar               279 arch/powerpc/kvm/book3s.c void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
dar               282 arch/powerpc/kvm/book3s.c 	kvmppc_set_dar(vcpu, dar);
dar              1045 arch/powerpc/kvm/book3s_emulate.c 	ulong dar = 0;
dar              1055 arch/powerpc/kvm/book3s_emulate.c 			dar = kvmppc_get_gpr(vcpu, ra);
dar              1056 arch/powerpc/kvm/book3s_emulate.c 		dar += (s32)((s16)inst);
dar              1060 arch/powerpc/kvm/book3s_emulate.c 			dar = kvmppc_get_gpr(vcpu, ra);
dar              1061 arch/powerpc/kvm/book3s_emulate.c 		dar += kvmppc_get_gpr(vcpu, rb);
dar              1068 arch/powerpc/kvm/book3s_emulate.c 	return dar;
dar               435 arch/powerpc/kvm/book3s_hv.c 	pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar);
dar              3578 arch/powerpc/kvm/book3s_hv.c 	mtspr(SPRN_DAR, vcpu->arch.shregs.dar);
dar              3617 arch/powerpc/kvm/book3s_hv.c 		vcpu->arch.shregs.dar = mfspr(SPRN_DAR);
dar              1186 arch/powerpc/kvm/book3s_pr.c 		ulong dar = kvmppc_get_fault_dar(vcpu);
dar              1198 arch/powerpc/kvm/book3s_pr.c 			sr = svcpu->sr[dar >> SID_SHIFT];
dar              1201 arch/powerpc/kvm/book3s_pr.c 				kvmppc_mmu_map_segment(vcpu, dar);
dar              1215 arch/powerpc/kvm/book3s_pr.c 			r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
dar              1218 arch/powerpc/kvm/book3s_pr.c 			kvmppc_core_queue_data_storage(vcpu, dar, fault_dsisr);
dar              1369 arch/powerpc/kvm/book3s_pr.c 			u64 dar;
dar              1372 arch/powerpc/kvm/book3s_pr.c 			dar = kvmppc_alignment_dar(vcpu, last_inst);
dar              1375 arch/powerpc/kvm/book3s_pr.c 			kvmppc_set_dar(vcpu, dar);
dar               127 arch/powerpc/kvm/booke_emulate.c 		vcpu->arch.shared->dar = spr_val;
dar               388 arch/powerpc/kvm/booke_emulate.c 		*spr_val = vcpu->arch.shared->dar;
dar               139 arch/powerpc/kvm/e500mc.c 	mtspr(SPRN_GDEAR, vcpu->arch.shared->dar);
dar               163 arch/powerpc/kvm/e500mc.c 	vcpu->arch.shared->dar = mfspr(SPRN_GDEAR);
dar               151 arch/powerpc/kvm/powerpc.c 	shared->dar = swab64(shared->dar);
dar                46 arch/powerpc/kvm/trace_booke.h 		__field(	unsigned long,	dar		)
dar                53 arch/powerpc/kvm/trace_booke.h 		__entry->dar		= kvmppc_get_fault_dar(vcpu);
dar                67 arch/powerpc/kvm/trace_booke.h 		__entry->dar,
dar               225 arch/powerpc/kvm/trace_pr.h 		__field(	unsigned long,	dar		)
dar               233 arch/powerpc/kvm/trace_pr.h 		__entry->dar		= kvmppc_get_fault_dar(vcpu);
dar               249 arch/powerpc/kvm/trace_pr.h 		__entry->dar,
dar               113 arch/powerpc/lib/sstep.c 		regs->dar = USER_DS.seg;
dar               115 arch/powerpc/lib/sstep.c 		regs->dar = ea;
dar               271 arch/powerpc/lib/sstep.c 		regs->dar = ea;
dar               309 arch/powerpc/lib/sstep.c 			regs->dar = ea;
dar               376 arch/powerpc/lib/sstep.c 		regs->dar = ea;
dar               414 arch/powerpc/lib/sstep.c 			regs->dar = ea;
dar               899 arch/powerpc/lib/sstep.c 			regs->dar = ea;
dar              2894 arch/powerpc/lib/sstep.c 			regs->dar = ea;
dar              2936 arch/powerpc/lib/sstep.c 			regs->dar = ea;
dar              3157 arch/powerpc/lib/sstep.c 			regs->dar = ea;
dar               665 arch/powerpc/mm/fault.c 			 regs->dar < PAGE_SIZE ? "Kernel NULL pointer dereference" :
dar               666 arch/powerpc/mm/fault.c 			 "Unable to handle kernel data access", regs->dar);
dar               675 arch/powerpc/mm/fault.c 			 regs->dar);
dar               679 arch/powerpc/mm/fault.c 			 regs->dar);
dar               188 arch/powerpc/perf/core-book3s.c 		sdar_valid = regs->dar & SIER_SDAR_VALID;
dar               217 arch/powerpc/perf/core-book3s.c 		return !!(regs->dar & SIER_SIHV);
dar               230 arch/powerpc/perf/core-book3s.c 		return !!(regs->dar & SIER_SIPR);
dar               293 arch/powerpc/perf/core-book3s.c 		regs->dar = mfspr(SPRN_SIER);
dar               351 arch/powerpc/perf/core-book3s.c 			return regs->dar & SIER_SIAR_VALID;
dar                66 arch/powerpc/perf/perf_regs.c 	PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
dar                68 arch/powerpc/perf/perf_regs.c 	PT_REGS_OFFSET(PERF_REG_POWERPC_SIER, dar),
dar                20 arch/powerpc/platforms/8xx/machine_check.c 		pr_cont("Data access error at address %lx\n", regs->dar);
dar                29 arch/powerpc/platforms/8xx/machine_check.c 	bad_page_fault(regs, regs->dar, SIGBUS);
dar               307 arch/powerpc/platforms/cell/spu_base.c 	unsigned long stat, mask, dar, dsisr;
dar               315 arch/powerpc/platforms/cell/spu_base.c 	dar   = spu_mfc_dar_get(spu);
dar               322 arch/powerpc/platforms/cell/spu_base.c 			dar, dsisr);
dar               325 arch/powerpc/platforms/cell/spu_base.c 		__spu_trap_data_seg(spu, dar);
dar               328 arch/powerpc/platforms/cell/spu_base.c 		__spu_trap_data_map(spu, dar, dsisr);
dar               337 arch/powerpc/platforms/pasemi/setup.c 	pr_err("DSISR 0x%016lx DAR  0x%016lx\n", dsisr, regs->dar);
dar               386 arch/powerpc/platforms/powernv/ocxl.c void pnv_ocxl_unmap_xsl_regs(void __iomem *dsisr, void __iomem *dar,
dar               390 arch/powerpc/platforms/powernv/ocxl.c 	iounmap(dar);
dar               397 arch/powerpc/platforms/powernv/ocxl.c 			void __iomem **dar, void __iomem **tfc,
dar               426 arch/powerpc/platforms/powernv/ocxl.c 		*dar = regs[1];
dar               107 arch/powerpc/platforms/powernv/opal-fadump.h 		regs->dar = reg_val;
dar               270 arch/powerpc/platforms/pseries/rtas-fadump.c 		regs->dar = (unsigned long)reg_val;
dar              1703 arch/powerpc/xmon/xmon.c 		printf("   dar: %lx\n", fp->dar);
dar              1780 arch/powerpc/xmon/xmon.c 		printf("dar = "REG"   dsisr = %.8lx\n", fp->dar, fp->dsisr);
dar               289 arch/sh/drivers/dma/dma-api.c 	channel->dar	= to;
dar               102 arch/sh/drivers/dma/dma-g2.c 	if (chan->dar & 31) {
dar               103 arch/sh/drivers/dma/dma-g2.c 		printk("g2dma: unaligned dest 0x%lx\n", chan->dar);
dar               112 arch/sh/drivers/dma/dma-g2.c 	chan->dar += 0xa0800000;
dar               121 arch/sh/drivers/dma/dma-g2.c 	g2_dma->channel[chan_nr].g2_addr   = chan->dar & 0x1fffffe0;
dar                55 arch/sh/drivers/dma/dma-pvr2.c 	if (chan->sar || !chan->dar)
dar                60 arch/sh/drivers/dma/dma-pvr2.c 	__raw_writel(chan->dar, PVR2_DMA_ADDR);
dar               220 arch/sh/drivers/dma/dma-sh.c 	if (chan->dar || (mach_is_dreamcast() &&
dar               222 arch/sh/drivers/dma/dma-sh.c 		__raw_writel(chan->dar, (dma_base_addr(chan->chan) + DAR));
dar                73 arch/sh/include/asm/dma.h 	unsigned long dar;
dar               397 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 	desc->lli.dar = cpu_to_le64(adr);
dar               526 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c 		le64_to_cpu(desc->lli.dar),
dar                69 drivers/dma/dw-axi-dmac/dw-axi-dmac.h 	__le64		dar;
dar               392 drivers/dma/dw-edma/dw-edma-core.c 				burst->dar = xfer->xfer.cyclic.paddr;
dar               394 drivers/dma/dw-edma/dw-edma-core.c 				burst->dar = sg_dma_address(sg);
dar               405 drivers/dma/dw-edma/dw-edma-core.c 			burst->dar = dst_addr;
dar                47 drivers/dma/dw-edma/dw-edma-core.h 	u64				dar;
dar               219 drivers/dma/dw-edma/dw-edma-v0-core.c 		SET_LL(&lli[i].dar_low, lower_32_bits(child->dar));
dar               220 drivers/dma/dw-edma/dw-edma-v0-core.c 		SET_LL(&lli[i].dar_high, upper_32_bits(child->dar));
dar               169 drivers/dma/dw/core.c 	channel_writel(dwc, DAR, lli_read(desc, dar));
dar               422 drivers/dma/dw/core.c 		 lli_read(desc, dar),
dar               591 drivers/dma/dw/core.c 		lli_write(desc, dar, dest + offset);
dar               681 drivers/dma/dw/core.c 			lli_write(desc, dar, reg);
dar               729 drivers/dma/dw/core.c 			lli_write(desc, dar, mem);
dar               370 drivers/dma/dw/regs.h 	__le32		dar;
dar               112 drivers/dma/fsldma.h 	u64 dar;	/* 0x18 - Destination Address Register */
dar               234 drivers/dma/idma64.c 	u64 sar, dar;
dar               241 drivers/dma/idma64.c 		dar = config->dst_addr;
dar               248 drivers/dma/idma64.c 		dar = hw->phys;
dar               252 drivers/dma/idma64.c 		dst_width = __ffs(dar | hw->len | 4);
dar               256 drivers/dma/idma64.c 	lli->dar = dar;
dar                98 drivers/dma/idma64.h 	u64		dar;
dar                50 drivers/dma/sh/rcar-dmac.c 	u32 dar;
dar               735 drivers/dma/sh/rcar-dmac.c 		hwdesc->dar = chunk->dst_addr;
dar                46 drivers/dma/sh/shdma.h 	u32 dar; /* DAR / destination address */
dar               218 drivers/dma/sh/shdmac.c 	sh_dmae_writel(sh_chan, hw->dar, DAR);
dar               291 drivers/dma/sh/shdmac.c 		sh_desc->hw.tcr, sh_desc->hw.sar, sh_desc->hw.dar);
dar               388 drivers/dma/sh/shdmac.c 	sh_desc->hw.dar = dst;
dar               464 drivers/dma/sh/shdmac.c 		 (sh_desc->hw.dar + sh_desc->hw.tcr) == dar_buf) ||
dar               586 drivers/misc/cxl/cxl.h 	u64 dar;
dar               970 drivers/misc/cxl/cxl.h int cxl_handle_mm_fault(struct mm_struct *mm, u64 dsisr, u64 dar);
dar               998 drivers/misc/cxl/cxl.h 	u64 dar;
dar               228 drivers/misc/cxl/cxllib.c 	u64 dar, vma_start, vma_end;
dar               244 drivers/misc/cxl/cxllib.c 	for (dar = (addr & ~(page_size - 1)); dar < (addr + size);
dar               245 drivers/misc/cxl/cxllib.c 	     dar += page_size) {
dar               246 drivers/misc/cxl/cxllib.c 		if (dar < vma_start || dar >= vma_end) {
dar               261 drivers/misc/cxl/cxllib.c 			rc = get_vma_info(mm, dar, &vma_start, &vma_end,
dar               267 drivers/misc/cxl/cxllib.c 		rc = cxl_handle_mm_fault(mm, flags, dar);
dar               105 drivers/misc/cxl/fault.c 	ctx->fault_addr = ctx->dar;
dar               131 drivers/misc/cxl/fault.c int cxl_handle_mm_fault(struct mm_struct *mm, u64 dsisr, u64 dar)
dar               153 drivers/misc/cxl/fault.c 	if ((result = copro_handle_mm_fault(mm, dar, dsisr, &flt))) {
dar               167 drivers/misc/cxl/fault.c 		if (!mm && (get_region_id(dar) != USER_REGION_ID))
dar               174 drivers/misc/cxl/fault.c 		hash_page_mm(mm, dar, access, 0x300, inv_flags);
dar               182 drivers/misc/cxl/fault.c 				  u64 dsisr, u64 dar)
dar               184 drivers/misc/cxl/fault.c 	trace_cxl_pte_miss(ctx, dsisr, dar);
dar               186 drivers/misc/cxl/fault.c 	if (cxl_handle_mm_fault(mm, dsisr, dar)) {
dar               233 drivers/misc/cxl/fault.c 	u64 dar = ctx->dar;
dar               238 drivers/misc/cxl/fault.c 		    cxl_p2n_read(ctx->afu, CXL_PSL_DAR_An) != dar ||
dar               256 drivers/misc/cxl/fault.c 		"DSISR: %#llx DAR: %#llx\n", ctx->pe, dsisr, dar);
dar               273 drivers/misc/cxl/fault.c 		cxl_handle_segment_miss(ctx, mm, dar);
dar               275 drivers/misc/cxl/fault.c 		cxl_handle_page_fault(ctx, mm, dsisr, dar);
dar               413 drivers/misc/cxl/hcalls.c 			info->dsisr, info->dar, info->dsr, info->reserved,
dar                25 drivers/misc/cxl/irq.c static irqreturn_t schedule_cxl_fault(struct cxl_context *ctx, u64 dsisr, u64 dar)
dar                28 drivers/misc/cxl/irq.c 	ctx->dar = dar;
dar                35 drivers/misc/cxl/irq.c 	u64 dsisr, dar;
dar                38 drivers/misc/cxl/irq.c 	dar = irq_info->dar;
dar                40 drivers/misc/cxl/irq.c 	trace_cxl_psl9_irq(ctx, irq, dsisr, dar);
dar                42 drivers/misc/cxl/irq.c 	pr_devel("CXL interrupt %i for afu pe: %i DSISR: %#llx DAR: %#llx\n", irq, ctx->pe, dsisr, dar);
dar                46 drivers/misc/cxl/irq.c 		return schedule_cxl_fault(ctx, dsisr, dar);
dar                86 drivers/misc/cxl/irq.c 	u64 dsisr, dar;
dar                89 drivers/misc/cxl/irq.c 	dar = irq_info->dar;
dar                91 drivers/misc/cxl/irq.c 	trace_cxl_psl_irq(ctx, irq, dsisr, dar);
dar                93 drivers/misc/cxl/irq.c 	pr_devel("CXL interrupt %i for afu pe: %i DSISR: %#llx DAR: %#llx\n", irq, ctx->pe, dsisr, dar);
dar               107 drivers/misc/cxl/irq.c 		return schedule_cxl_fault(ctx, dsisr, dar);
dar               128 drivers/misc/cxl/irq.c 		return schedule_cxl_fault(ctx, dsisr, dar);
dar               134 drivers/misc/cxl/native.c 	u64 dsisr, dar;
dar               181 drivers/misc/cxl/native.c 			dar = cxl_p2n_read(afu, CXL_PSL_DAR_An);
dar               183 drivers/misc/cxl/native.c 				   dsisr, dar);
dar              1093 drivers/misc/cxl/native.c 	info->dar = cxl_p2n_read(afu, CXL_PSL_DAR_An);
dar              1210 drivers/misc/cxl/native.c 		irq_info.dar);
dar               163 drivers/misc/cxl/trace.h 	TP_PROTO(struct cxl_context *ctx, int irq, u64 dsisr, u64 dar),
dar               165 drivers/misc/cxl/trace.h 	TP_ARGS(ctx, irq, dsisr, dar),
dar               173 drivers/misc/cxl/trace.h 		__field(u64, dar)
dar               182 drivers/misc/cxl/trace.h 		__entry->dar = dar;
dar               192 drivers/misc/cxl/trace.h 		__entry->dar
dar               197 drivers/misc/cxl/trace.h 	TP_PROTO(struct cxl_context *ctx, int irq, u64 dsisr, u64 dar),
dar               199 drivers/misc/cxl/trace.h 	TP_ARGS(ctx, irq, dsisr, dar),
dar               207 drivers/misc/cxl/trace.h 		__field(u64, dar)
dar               216 drivers/misc/cxl/trace.h 		__entry->dar = dar;
dar               225 drivers/misc/cxl/trace.h 		__entry->dar
dar               257 drivers/misc/cxl/trace.h 	TP_PROTO(struct cxl_context *ctx, u64 dar),
dar               259 drivers/misc/cxl/trace.h 	TP_ARGS(ctx, dar),
dar               265 drivers/misc/cxl/trace.h 		__field(u64, dar)
dar               272 drivers/misc/cxl/trace.h 		__entry->dar = dar;
dar               279 drivers/misc/cxl/trace.h 		__entry->dar
dar               317 drivers/misc/cxl/trace.h 	TP_PROTO(struct cxl_context *ctx, u64 dsisr, u64 dar),
dar               319 drivers/misc/cxl/trace.h 	TP_ARGS(ctx, dsisr, dar),
dar               326 drivers/misc/cxl/trace.h 		__field(u64, dar)
dar               334 drivers/misc/cxl/trace.h 		__entry->dar = dar;
dar               342 drivers/misc/cxl/trace.h 		__entry->dar
dar                66 drivers/misc/ocxl/link.c 		u64 dar;
dar                99 drivers/misc/ocxl/link.c static void read_irq(struct spa *spa, u64 *dsisr, u64 *dar, u64 *pe)
dar               104 drivers/misc/ocxl/link.c 	*dar = in_be64(spa->reg_dar);
dar               123 drivers/misc/ocxl/link.c 				spa->xsl_fault.dsisr, spa->xsl_fault.dar, reg);
dar               143 drivers/misc/ocxl/link.c 	rc = copro_handle_mm_fault(fault->pe_data.mm, fault->dar, fault->dsisr,
dar               150 drivers/misc/ocxl/link.c 				fault->dar, fault->dsisr);
dar               166 drivers/misc/ocxl/link.c 		if (get_region_id(fault->dar) != USER_REGION_ID)
dar               170 drivers/misc/ocxl/link.c 		hash_page_mm(fault->pe_data.mm, fault->dar, access, 0x300,
dar               184 drivers/misc/ocxl/link.c 	u64 dsisr, dar, pe_handle;
dar               190 drivers/misc/ocxl/link.c 	read_irq(spa, &dsisr, &dar, &pe_handle);
dar               191 drivers/misc/ocxl/link.c 	trace_ocxl_fault(spa->spa_mem, pe_handle, dsisr, dar, -1);
dar               242 drivers/misc/ocxl/link.c 			spa->xsl_fault.dar = dar;
dar                71 drivers/misc/ocxl/trace.h 	TP_PROTO(void *spa, u64 pe, u64 dsisr, u64 dar, u64 tfc),
dar                72 drivers/misc/ocxl/trace.h 	TP_ARGS(spa, pe, dsisr, dar, tfc),
dar                78 drivers/misc/ocxl/trace.h 		__field(u64, dar)
dar                86 drivers/misc/ocxl/trace.h 		__entry->dar = dar;
dar                94 drivers/misc/ocxl/trace.h 		__entry->dar,
dar               100 drivers/misc/ocxl/trace.h 	TP_PROTO(void *spa, u64 pe, u64 dsisr, u64 dar, u64 tfc),
dar               101 drivers/misc/ocxl/trace.h 	TP_ARGS(spa, pe, dsisr, dar, tfc)
dar               105 drivers/misc/ocxl/trace.h 	TP_PROTO(void *spa, u64 pe, u64 dsisr, u64 dar, u64 tfc),
dar               106 drivers/misc/ocxl/trace.h 	TP_ARGS(spa, pe, dsisr, dar, tfc)
dar                26 drivers/staging/comedi/drivers/mite.h 	u32 dar;
dar               723 sound/soc/fsl/fsl_dma.c 		position = in_be32(&dma_channel->dar);
dar               787 sound/soc/fsl/fsl_dma.c 		out_be32(&dma_channel->dar, 0);
dar                19 sound/soc/fsl/fsl_dma.h 		__be32 dar;     /* Destination address register */
dar                24 tools/perf/arch/powerpc/include/dwarf-regs-table.h 	REG_DWARFNUM_NAME(dar,   119),
dar                71 tools/perf/arch/powerpc/util/dwarf-regs.c 	REG_DWARFNUM_NAME(dar,   119),
dar                54 tools/perf/arch/powerpc/util/perf_regs.c 	SMPL_REG(dar, PERF_REG_POWERPC_DAR),
dar                34 tools/testing/selftests/powerpc/mm/subpage_prot.c volatile void *dar;
dar                48 tools/testing/selftests/powerpc/mm/subpage_prot.c 	dar = (void *)regs->dar;
dar                84 tools/testing/selftests/powerpc/mm/subpage_prot.c 		if (dar != addr) {
dar                86 tools/testing/selftests/powerpc/mm/subpage_prot.c 			       addr, dar);