DOMAIN1_PG_CONFIG  190 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	SR(DOMAIN1_PG_CONFIG), \
DOMAIN1_PG_CONFIG  236 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	SR(DOMAIN1_PG_CONFIG), \
DOMAIN1_PG_CONFIG  303 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	SR(DOMAIN1_PG_CONFIG), \
DOMAIN1_PG_CONFIG  365 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	uint32_t DOMAIN1_PG_CONFIG;
DOMAIN1_PG_CONFIG  549 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, mask_sh), \
DOMAIN1_PG_CONFIG  550 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_GATE, mask_sh), \
DOMAIN1_PG_CONFIG  586 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, mask_sh), \
DOMAIN1_PG_CONFIG  587 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_GATE, mask_sh), \
DOMAIN1_PG_CONFIG  650 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, mask_sh), \
DOMAIN1_PG_CONFIG  651 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_GATE, mask_sh), \
DOMAIN1_PG_CONFIG  457 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, force_on);
DOMAIN1_PG_CONFIG  506 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	if (REG(DOMAIN1_PG_CONFIG) == 0)
DOMAIN1_PG_CONFIG  511 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		REG_UPDATE(DOMAIN1_PG_CONFIG,
DOMAIN1_PG_CONFIG   87 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, force_on);
DOMAIN1_PG_CONFIG  335 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	if (REG(DOMAIN1_PG_CONFIG) == 0)
DOMAIN1_PG_CONFIG  340 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		REG_UPDATE(DOMAIN1_PG_CONFIG,