DMIF_PG            51 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SRI(DPG_PIPE_ARBITRATION_CONTROL1, DMIF_PG, id),\
DMIF_PG            52 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SRI(DPG_WATERMARK_MASK_CONTROL, DMIF_PG, id),\
DMIF_PG            53 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SRI(DPG_PIPE_URGENCY_CONTROL, DMIF_PG, id),\
DMIF_PG            54 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SRI(DPG_PIPE_STUTTER_CONTROL, DMIF_PG, id),\
DMIF_PG            63 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SRI(DPG_PIPE_NB_PSTATE_CHANGE_CONTROL, DMIF_PG, id)
DMIF_PG            77 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SRI(DPG_PIPE_STUTTER_CONTROL2, DMIF_PG, id),\
DMIF_PG            78 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h 	SRI(DPG_PIPE_LOW_POWER_CONTROL, DMIF_PG, id),\