DMCU_RAM_ACCESS_CTRL   77 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
DMCU_RAM_ACCESS_CTRL   89 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
DMCU_RAM_ACCESS_CTRL  103 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE(DMCU_RAM_ACCESS_CTRL, IRAM_HOST_ACCESS_EN, 1);
DMCU_RAM_ACCESS_CTRL  116 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE(DMCU_RAM_ACCESS_CTRL, IRAM_HOST_ACCESS_EN, 0);
DMCU_RAM_ACCESS_CTRL  328 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
DMCU_RAM_ACCESS_CTRL  343 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
DMCU_RAM_ACCESS_CTRL  449 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
DMCU_RAM_ACCESS_CTRL  461 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
DMCU_RAM_ACCESS_CTRL  492 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE(DMCU_RAM_ACCESS_CTRL, IRAM_HOST_ACCESS_EN, 1);
DMCU_RAM_ACCESS_CTRL  505 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE(DMCU_RAM_ACCESS_CTRL, IRAM_HOST_ACCESS_EN, 0);
DMCU_RAM_ACCESS_CTRL   35 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	SR(DMCU_RAM_ACCESS_CTRL), \
DMCU_RAM_ACCESS_CTRL   52 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	SR(DMCU_RAM_ACCESS_CTRL), \
DMCU_RAM_ACCESS_CTRL   84 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
DMCU_RAM_ACCESS_CTRL   86 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
DMCU_RAM_ACCESS_CTRL   88 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
DMCU_RAM_ACCESS_CTRL  110 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
DMCU_RAM_ACCESS_CTRL  112 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
DMCU_RAM_ACCESS_CTRL  114 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
DMCU_RAM_ACCESS_CTRL  162 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	uint32_t DMCU_RAM_ACCESS_CTRL;
DMCU_RAM_ACCESS_CTRL   47 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h 	SR(DMCU_RAM_ACCESS_CTRL), \
DMCU_RAM_ACCESS_CTRL  123 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h 	uint32_t DMCU_RAM_ACCESS_CTRL;