DMCU_INTERRUPT_TO_UC_EN_MASK  176 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE_4(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  185 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 		REG_UPDATE(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  189 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 		REG_UPDATE(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  193 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 		REG_UPDATE(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  197 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 		REG_UPDATE(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  214 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 		REG_UPDATE(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  585 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 	REG_UPDATE_4(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  594 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 		REG_UPDATE(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  598 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 		REG_UPDATE(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  602 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 		REG_UPDATE(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  606 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 		REG_UPDATE(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK  623 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c 		REG_UPDATE(DMCU_INTERRUPT_TO_UC_EN_MASK,
DMCU_INTERRUPT_TO_UC_EN_MASK   45 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	SR(DMCU_INTERRUPT_TO_UC_EN_MASK), \
DMCU_INTERRUPT_TO_UC_EN_MASK   62 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	SR(DMCU_INTERRUPT_TO_UC_EN_MASK), \
DMCU_INTERRUPT_TO_UC_EN_MASK   93 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_SF(DMCU_INTERRUPT_TO_UC_EN_MASK, \
DMCU_INTERRUPT_TO_UC_EN_MASK   95 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_SF(DMCU_INTERRUPT_TO_UC_EN_MASK, \
DMCU_INTERRUPT_TO_UC_EN_MASK   97 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_SF(DMCU_INTERRUPT_TO_UC_EN_MASK, \
DMCU_INTERRUPT_TO_UC_EN_MASK   99 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	DMCU_SF(DMCU_INTERRUPT_TO_UC_EN_MASK, \
DMCU_INTERRUPT_TO_UC_EN_MASK  175 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h 	uint32_t DMCU_INTERRUPT_TO_UC_EN_MASK;
DMCU_INTERRUPT_TO_UC_EN_MASK   50 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h 	SR(DMCU_INTERRUPT_TO_UC_EN_MASK), \
DMCU_INTERRUPT_TO_UC_EN_MASK  128 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h 	uint32_t DMCU_INTERRUPT_TO_UC_EN_MASK;