d_info            638 drivers/gpu/drm/i915/gvt/cmd_parser.c 	const struct decode_info *d_info;
d_info            640 drivers/gpu/drm/i915/gvt/cmd_parser.c 	d_info = ring_decode_info[ring_id][CMD_TYPE(cmd)];
d_info            641 drivers/gpu/drm/i915/gvt/cmd_parser.c 	if (d_info == NULL)
d_info            644 drivers/gpu/drm/i915/gvt/cmd_parser.c 	return cmd >> (32 - d_info->op_len);
d_info            678 drivers/gpu/drm/i915/gvt/cmd_parser.c 	const struct decode_info *d_info;
d_info            681 drivers/gpu/drm/i915/gvt/cmd_parser.c 	d_info = ring_decode_info[ring_id][CMD_TYPE(cmd)];
d_info            682 drivers/gpu/drm/i915/gvt/cmd_parser.c 	if (d_info == NULL)
d_info            686 drivers/gpu/drm/i915/gvt/cmd_parser.c 			cmd >> (32 - d_info->op_len), d_info->name);
d_info            688 drivers/gpu/drm/i915/gvt/cmd_parser.c 	for (i = 0; i < d_info->nr_sub_op; i++)
d_info            689 drivers/gpu/drm/i915/gvt/cmd_parser.c 		pr_err("0x%x ", sub_op_val(cmd, d_info->sub_op[i].hi,
d_info            690 drivers/gpu/drm/i915/gvt/cmd_parser.c 					d_info->sub_op[i].low));