d9                 57 drivers/ipack/devices/scc2698.h 		u8 d9, srb;  /* Status register (b) */
d9                 75 drivers/ipack/devices/scc2698.h 		u8 d9, csrb; /* Clock select register (a) */
d9                 99 drivers/media/dvb-frontends/dib9000.c 		} d9;
d9               1005 drivers/media/dvb-frontends/dib9000.c 	dib9000_write_word(state, 911, state->chip.d9.cfg.if_drives);
d9               1085 drivers/media/dvb-frontends/dib9000.c 	if (dib9000_fw_boot(state, NULL, 0, state->chip.d9.cfg.microcode_B_fe_buffer, state->chip.d9.cfg.microcode_B_fe_size) != 0)
d9               1089 drivers/media/dvb-frontends/dib9000.c 	for (i = 0; i < ARRAY_SIZE(state->chip.d9.cfg.gpio_function); i++) {
d9               1090 drivers/media/dvb-frontends/dib9000.c 		f = &state->chip.d9.cfg.gpio_function[i];
d9               1110 drivers/media/dvb-frontends/dib9000.c 	b[0] = state->chip.d9.cfg.subband.size;	/* type == 0 -> GPIO - PWM not yet supported */
d9               1111 drivers/media/dvb-frontends/dib9000.c 	for (i = 0; i < state->chip.d9.cfg.subband.size; i++) {
d9               1112 drivers/media/dvb-frontends/dib9000.c 		b[1 + i * 4] = state->chip.d9.cfg.subband.subband[i].f_mhz;
d9               1113 drivers/media/dvb-frontends/dib9000.c 		b[2 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.mask;
d9               1114 drivers/media/dvb-frontends/dib9000.c 		b[3 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.direction;
d9               1115 drivers/media/dvb-frontends/dib9000.c 		b[4 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.value;
d9               1125 drivers/media/dvb-frontends/dib9000.c 	b[2] = (u16) (((state->chip.d9.cfg.xtal_clock_khz * 1000) >> 16) & 0xffff);
d9               1126 drivers/media/dvb-frontends/dib9000.c 	b[3] = (u16) (((state->chip.d9.cfg.xtal_clock_khz * 1000)) & 0xffff);
d9               1127 drivers/media/dvb-frontends/dib9000.c 	b[4] = (u16) ((state->chip.d9.cfg.vcxo_timer >> 16) & 0xffff);
d9               1128 drivers/media/dvb-frontends/dib9000.c 	b[5] = (u16) ((state->chip.d9.cfg.vcxo_timer) & 0xffff);
d9               1129 drivers/media/dvb-frontends/dib9000.c 	b[6] = (u16) ((state->chip.d9.cfg.timing_frequency >> 16) & 0xffff);
d9               1130 drivers/media/dvb-frontends/dib9000.c 	b[7] = (u16) ((state->chip.d9.cfg.timing_frequency) & 0xffff);
d9               1131 drivers/media/dvb-frontends/dib9000.c 	b[29] = state->chip.d9.cfg.if_drives;
d9               1575 drivers/media/dvb-frontends/dib9000.c 		if (state->chip.d9.cfg.output_mpeg2_in_188_bytes)
d9               2130 drivers/media/dvb-frontends/dib9000.c 	dib9000_fw_set_output_mode(state->fe[0], state->chip.d9.cfg.output_mode);
d9               2486 drivers/media/dvb-frontends/dib9000.c 	memcpy(&st->chip.d9.cfg, cfg, sizeof(struct dib9000_config));
d9               2512 drivers/media/dvb-frontends/dib9000.c 	if ((st->chip.d9.cfg.output_mode != OUTMODE_MPEG2_SERIAL) && (st->chip.d9.cfg.output_mode != OUTMODE_MPEG2_PAR_GATED_CLK))
d9               2513 drivers/media/dvb-frontends/dib9000.c 		st->chip.d9.cfg.output_mode = OUTMODE_MPEG2_FIFO;