d2vga_control     895 drivers/gpu/drm/amd/amdgpu/cik.c 	u32 d2vga_control = 0;
d2vga_control     903 drivers/gpu/drm/amd/amdgpu/cik.c 		d2vga_control = RREG32(mmD2VGA_CONTROL);
d2vga_control     916 drivers/gpu/drm/amd/amdgpu/cik.c 		       (d2vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK |
d2vga_control     929 drivers/gpu/drm/amd/amdgpu/cik.c 		WREG32(mmD2VGA_CONTROL, d2vga_control);
d2vga_control    1115 drivers/gpu/drm/amd/amdgpu/si.c 	u32 d2vga_control = 0;
d2vga_control    1123 drivers/gpu/drm/amd/amdgpu/si.c 		d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
d2vga_control    1136 drivers/gpu/drm/amd/amdgpu/si.c 		       (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
d2vga_control    1149 drivers/gpu/drm/amd/amdgpu/si.c 		WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
d2vga_control     379 drivers/gpu/drm/amd/amdgpu/vi.c 	u32 d2vga_control = 0;
d2vga_control     387 drivers/gpu/drm/amd/amdgpu/vi.c 		d2vga_control = RREG32(mmD2VGA_CONTROL);
d2vga_control     400 drivers/gpu/drm/amd/amdgpu/vi.c 		       (d2vga_control & ~(D2VGA_CONTROL__D2VGA_MODE_ENABLE_MASK |
d2vga_control     413 drivers/gpu/drm/amd/amdgpu/vi.c 		WREG32(mmD2VGA_CONTROL, d2vga_control);
d2vga_control     255 drivers/gpu/drm/radeon/radeon_bios.c 	u32 d2vga_control;
d2vga_control     262 drivers/gpu/drm/radeon/radeon_bios.c 	d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
d2vga_control     274 drivers/gpu/drm/radeon/radeon_bios.c 		       (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
d2vga_control     287 drivers/gpu/drm/radeon/radeon_bios.c 		WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
d2vga_control     299 drivers/gpu/drm/radeon/radeon_bios.c 	uint32_t d2vga_control;
d2vga_control     309 drivers/gpu/drm/radeon/radeon_bios.c 	d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
d2vga_control     322 drivers/gpu/drm/radeon/radeon_bios.c 	       (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
d2vga_control     357 drivers/gpu/drm/radeon/radeon_bios.c 	WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
d2vga_control     368 drivers/gpu/drm/radeon/radeon_bios.c 	uint32_t d2vga_control;
d2vga_control     382 drivers/gpu/drm/radeon/radeon_bios.c 	d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
d2vga_control     401 drivers/gpu/drm/radeon/radeon_bios.c 	       (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
d2vga_control     428 drivers/gpu/drm/radeon/radeon_bios.c 	WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
d2vga_control     446 drivers/gpu/drm/radeon/radeon_bios.c 	uint32_t d2vga_control;
d2vga_control     457 drivers/gpu/drm/radeon/radeon_bios.c 	d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
d2vga_control     481 drivers/gpu/drm/radeon/radeon_bios.c 	       (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
d2vga_control     493 drivers/gpu/drm/radeon/radeon_bios.c 	WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);