curs 85 drivers/gpu/drm/nouveau/dispnv50/atom.h } curs; curs 130 drivers/gpu/drm/nouveau/dispnv50/atom.h bool curs:1; curs 56 drivers/gpu/drm/nouveau/dispnv50/curs507a.c if (asyh->curs.handle != handle || asyh->curs.offset != offset) { curs 57 drivers/gpu/drm/nouveau/dispnv50/curs507a.c asyh->curs.handle = handle; curs 58 drivers/gpu/drm/nouveau/dispnv50/curs507a.c asyh->curs.offset = offset; curs 59 drivers/gpu/drm/nouveau/dispnv50/curs507a.c asyh->set.curs = asyh->curs.visible; curs 67 drivers/gpu/drm/nouveau/dispnv50/curs507a.c asyh->curs.visible = false; curs 81 drivers/gpu/drm/nouveau/dispnv50/curs507a.c asyh->curs.visible = asyw->state.visible; curs 82 drivers/gpu/drm/nouveau/dispnv50/curs507a.c if (ret || !asyh->curs.visible) curs 42 drivers/gpu/drm/nouveau/dispnv50/head.c if (clr.curs) head->func->curs_clr(head); curs 58 drivers/gpu/drm/nouveau/dispnv50/head.c if (asyh->set.curs ) head->func->curs_set(head, asyh); curs 360 drivers/gpu/drm/nouveau/dispnv50/head.c asyh->curs.visible = false; curs 374 drivers/gpu/drm/nouveau/dispnv50/head.c if (asyh->curs.visible) { curs 375 drivers/gpu/drm/nouveau/dispnv50/head.c if (memcmp(&armh->curs, &asyh->curs, sizeof(asyh->curs))) curs 376 drivers/gpu/drm/nouveau/dispnv50/head.c asyh->set.curs = true; curs 378 drivers/gpu/drm/nouveau/dispnv50/head.c if (armh->curs.visible) { curs 379 drivers/gpu/drm/nouveau/dispnv50/head.c asyh->clr.curs = true; curs 392 drivers/gpu/drm/nouveau/dispnv50/head.c asyh->clr.curs = armh->curs.visible; curs 395 drivers/gpu/drm/nouveau/dispnv50/head.c asyh->set.curs = asyh->curs.visible; curs 430 drivers/gpu/drm/nouveau/dispnv50/head.c asyh->curs = armh->curs; curs 482 drivers/gpu/drm/nouveau/dispnv50/head.c struct nv50_wndw *base, *ovly, *curs; curs 503 drivers/gpu/drm/nouveau/dispnv50/head.c ret = nv50_curs_new(drm, head->base.index, &curs); curs 510 drivers/gpu/drm/nouveau/dispnv50/head.c drm_crtc_init_with_planes(dev, crtc, &base->plane, &curs->plane, curs 125 drivers/gpu/drm/nouveau/dispnv50/head507d.c evo_data(push, 0x80000000 | asyh->curs.layout << 26 | curs 126 drivers/gpu/drm/nouveau/dispnv50/head507d.c asyh->curs.format << 24); curs 127 drivers/gpu/drm/nouveau/dispnv50/head507d.c evo_data(push, asyh->curs.offset >> 8); curs 137 drivers/gpu/drm/nouveau/dispnv50/head507d.c case 0xcf: asyh->curs.format = 1; break; curs 150 drivers/gpu/drm/nouveau/dispnv50/head507d.c case 32: asyh->curs.layout = 0; break; curs 151 drivers/gpu/drm/nouveau/dispnv50/head507d.c case 64: asyh->curs.layout = 1; break; curs 195 drivers/gpu/drm/nouveau/dispnv50/head507d.c asyh->set.curs = asyh->curs.visible; curs 211 drivers/gpu/drm/nouveau/dispnv50/head507d.c (asyh->core.visible = asyh->curs.visible)) { curs 46 drivers/gpu/drm/nouveau/dispnv50/head827d.c evo_data(push, 0x80000000 | asyh->curs.layout << 26 | curs 47 drivers/gpu/drm/nouveau/dispnv50/head827d.c asyh->curs.format << 24); curs 48 drivers/gpu/drm/nouveau/dispnv50/head827d.c evo_data(push, asyh->curs.offset >> 8); curs 50 drivers/gpu/drm/nouveau/dispnv50/head827d.c evo_data(push, asyh->curs.handle); curs 144 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, 0x80000000 | asyh->curs.layout << 26 | curs 145 drivers/gpu/drm/nouveau/dispnv50/head907d.c asyh->curs.format << 24); curs 146 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, asyh->curs.offset >> 8); curs 148 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, asyh->curs.handle); curs 71 drivers/gpu/drm/nouveau/dispnv50/head917d.c case 32: asyh->curs.layout = 0; break; curs 72 drivers/gpu/drm/nouveau/dispnv50/head917d.c case 64: asyh->curs.layout = 1; break; curs 73 drivers/gpu/drm/nouveau/dispnv50/head917d.c case 128: asyh->curs.layout = 2; break; curs 74 drivers/gpu/drm/nouveau/dispnv50/head917d.c case 256: asyh->curs.layout = 3; break; curs 104 drivers/gpu/drm/nouveau/dispnv50/headc37d.c asyh->curs.layout << 8 | curs 105 drivers/gpu/drm/nouveau/dispnv50/headc37d.c asyh->curs.format << 0); curs 108 drivers/gpu/drm/nouveau/dispnv50/headc37d.c evo_data(push, asyh->curs.handle); curs 110 drivers/gpu/drm/nouveau/dispnv50/headc37d.c evo_data(push, asyh->curs.offset >> 8); curs 119 drivers/gpu/drm/nouveau/dispnv50/headc37d.c asyh->curs.format = asyw->image.format; curs 191 drivers/net/hamradio/baycom_ser_fdx.c static __inline__ void ser12_rx(struct net_device *dev, struct baycom_state *bc, struct timespec64 *ts, unsigned char curs) curs 224 drivers/net/hamradio/baycom_ser_fdx.c if (bc->modem.ser12.last_rxbit != curs) { curs 225 drivers/net/hamradio/baycom_ser_fdx.c bc->modem.ser12.last_rxbit = curs; curs 682 drivers/video/console/vgacon.c int curs, cure; curs 692 drivers/video/console/vgacon.c curs = inb_p(vga_video_port_val); curs 696 drivers/video/console/vgacon.c curs = 0; curs 700 drivers/video/console/vgacon.c curs = (curs & 0xc0) | from; curs 704 drivers/video/console/vgacon.c outb_p(curs, vga_video_port_val); curs 179 net/smc/smc_cdc.c union smc_host_cursor curs; curs 185 net/smc/smc_cdc.c curs.acurs.counter = atomic64_read(&conn->local_tx_ctrl.prod.acurs); curs 186 net/smc/smc_cdc.c cdc.prod.wrap = curs.wrap; curs 187 net/smc/smc_cdc.c cdc.prod.count = curs.count; curs 188 net/smc/smc_cdc.c curs.acurs.counter = atomic64_read(&conn->local_tx_ctrl.cons.acurs); curs 189 net/smc/smc_cdc.c cdc.cons.wrap = curs.wrap; curs 190 net/smc/smc_cdc.c cdc.cons.count = curs.count; curs 196 net/smc/smc_cdc.c smc_curs_copy(&conn->rx_curs_confirmed, &curs, conn); curs 90 net/smc/smc_cdc.h static inline void smc_curs_add(int size, union smc_host_cursor *curs, curs 93 net/smc/smc_cdc.h curs->count += value; curs 94 net/smc/smc_cdc.h if (curs->count >= size) { curs 95 net/smc/smc_cdc.h curs->wrap++; curs 96 net/smc/smc_cdc.h curs->count -= size; curs 101 net/smc/smc_cdc.h static inline u64 smc_curs_read(union smc_host_cursor *curs, curs 109 net/smc/smc_cdc.h ret = curs->acurs; curs 113 net/smc/smc_cdc.h return atomic64_read(&curs->acurs);