cur_master        179 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct dpu_encoder_phys *cur_master;
cur_master        709 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!dpu_enc->cur_master) {
cur_master       1108 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!dpu_enc || !dpu_enc->cur_master) {
cur_master       1113 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (dpu_enc->cur_master->hw_mdptop &&
cur_master       1114 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			dpu_enc->cur_master->hw_mdptop->ops.reset_ubwc)
cur_master       1115 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		dpu_enc->cur_master->hw_mdptop->ops.reset_ubwc(
cur_master       1116 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				dpu_enc->cur_master->hw_mdptop,
cur_master       1133 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (dpu_enc->cur_master && dpu_enc->cur_master->ops.restore)
cur_master       1134 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		dpu_enc->cur_master->ops.restore(dpu_enc->cur_master);
cur_master       1164 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (dpu_enc->cur_master && dpu_enc->cur_master->ops.enable)
cur_master       1165 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		dpu_enc->cur_master->ops.enable(dpu_enc->cur_master);
cur_master       1592 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (pending_flush && dpu_enc->cur_master) {
cur_master       1595 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				dpu_enc->cur_master,
cur_master       1599 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	_dpu_encoder_trigger_start(dpu_enc->cur_master);
cur_master       1628 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			if ((phys == dpu_enc->cur_master) &&
cur_master       1646 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!dpu_enc->cur_master)
cur_master       1649 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!dpu_enc->cur_master->ops.get_line_count) {
cur_master       1704 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	cur_line = dpu_enc->cur_master->ops.get_line_count(dpu_enc->cur_master);
cur_master       2025 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		dpu_enc->cur_master = enc;
cur_master       2051 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc->cur_master = NULL;
cur_master       2310 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (dpu_enc->cur_master)
cur_master       2311 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		return dpu_enc->cur_master->intf_mode;
cur_master        461 drivers/i3c/master.c 		      i3cbus->cur_master->info.pid);
cur_master       1557 drivers/i3c/master.c 	master->bus.cur_master = master->this;
cur_master        333 include/linux/i3c/master.h 	struct i3c_dev_desc *cur_master;