cu 110 arch/m68k/fpsp040/fpsp.h .set CU_ONLY,LV+122 | cu-only flag cu 26 arch/s390/include/asm/ccwdev.h #define CCW_DEVICE(cu, cum) \ cu 27 arch/s390/include/asm/ccwdev.h .cu_type=(cu), .cu_model=(cum), \ cu 31 arch/s390/include/asm/ccwdev.h #define CCW_DEVICE_DEVTYPE(cu, cum, dev, devm) \ cu 32 arch/s390/include/asm/ccwdev.h .cu_type=(cu), .cu_model=(cum), .dev_type=(dev), .dev_model=(devm),\ cu 623 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c uint32_t offset, se, sh, cu, wave, simd, data[32]; cu 632 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c cu = (*pos & GENMASK_ULL(30, 23)) >> 23; cu 638 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c amdgpu_gfx_select_se_sh(adev, se, sh, cu); cu 695 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; cu 704 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c cu = (*pos & GENMASK_ULL(35, 28)) >> 28; cu 716 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c amdgpu_gfx_select_se_sh(adev, se, sh, cu); cu 146 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c unsigned se, sh, cu; cu 157 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c int ret = sscanf(p, "%u.%u.%u", &se, &sh, &cu); cu 163 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (se < max_se && sh < max_sh && cu < 16) { cu 164 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c DRM_INFO("amdgpu: disabling CU %u.%u.%u\n", se, sh, cu); cu 165 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c mask[se * max_sh + sh] |= 1u << cu; cu 168 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c se, sh, cu); cu 73 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h unsigned char cu; cu 145 drivers/gpu/drm/amd/amdkfd/kfd_crat.c struct crat_subtype_computeunit *cu) cu 147 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.cpu_cores_count = cu->num_cpu_cores; cu 148 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.cpu_core_id_base = cu->processor_id_low; cu 149 drivers/gpu/drm/amd/amdkfd/kfd_crat.c if (cu->hsa_capability & CRAT_CU_FLAGS_IOMMU_PRESENT) cu 152 drivers/gpu/drm/amd/amdkfd/kfd_crat.c pr_debug("CU CPU: cores=%d id_base=%d\n", cu->num_cpu_cores, cu 153 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->processor_id_low); cu 157 drivers/gpu/drm/amd/amdkfd/kfd_crat.c struct crat_subtype_computeunit *cu) cu 159 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.simd_id_base = cu->processor_id_low; cu 160 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.simd_count = cu->num_simd_cores; cu 161 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.lds_size_in_kb = cu->lds_size_in_kb; cu 162 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.max_waves_per_simd = cu->max_waves_simd; cu 163 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.wave_front_size = cu->wave_front_size; cu 164 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.array_count = cu->array_count; cu 165 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.cu_per_simd_array = cu->num_cu_per_array; cu 166 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.simd_per_cu = cu->num_simd_per_cu; cu 167 drivers/gpu/drm/amd/amdkfd/kfd_crat.c dev->node_props.max_slots_scratch_cu = cu->max_slots_scatch_cu; cu 168 drivers/gpu/drm/amd/amdkfd/kfd_crat.c if (cu->hsa_capability & CRAT_CU_FLAGS_HOT_PLUGGABLE) cu 170 drivers/gpu/drm/amd/amdkfd/kfd_crat.c pr_debug("CU GPU: id_base=%d\n", cu->processor_id_low); cu 176 drivers/gpu/drm/amd/amdkfd/kfd_crat.c static int kfd_parse_subtype_cu(struct crat_subtype_computeunit *cu, cu 182 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->proximity_domain, cu->hsa_capability); cu 184 drivers/gpu/drm/amd/amdkfd/kfd_crat.c if (cu->proximity_domain == dev->proximity_domain) { cu 185 drivers/gpu/drm/amd/amdkfd/kfd_crat.c if (cu->flags & CRAT_CU_FLAGS_CPU_PRESENT) cu 186 drivers/gpu/drm/amd/amdkfd/kfd_crat.c kfd_populated_cu_info_cpu(dev, cu); cu 188 drivers/gpu/drm/amd/amdkfd/kfd_crat.c if (cu->flags & CRAT_CU_FLAGS_GPU_PRESENT) cu 189 drivers/gpu/drm/amd/amdkfd/kfd_crat.c kfd_populated_cu_info_gpu(dev, cu); cu 429 drivers/gpu/drm/amd/amdkfd/kfd_crat.c struct crat_subtype_computeunit *cu; cu 437 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu = (struct crat_subtype_computeunit *)sub_type_hdr; cu 438 drivers/gpu/drm/amd/amdkfd/kfd_crat.c ret = kfd_parse_subtype_cu(cu, device_list); cu 1145 drivers/gpu/drm/amd/amdkfd/kfd_crat.c struct crat_subtype_computeunit *cu; cu 1188 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu = (struct crat_subtype_computeunit *)sub_type_hdr; cu 1189 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->flags |= CRAT_CU_FLAGS_GPU_PRESENT; cu 1190 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->proximity_domain = proximity_domain; cu 1193 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->num_simd_per_cu = cu_info.simd_per_cu; cu 1194 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->num_simd_cores = cu_info.simd_per_cu * cu_info.cu_active_number; cu 1195 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->max_waves_simd = cu_info.max_waves_per_simd; cu 1197 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->wave_front_size = cu_info.wave_front_size; cu 1198 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->array_count = cu_info.num_shader_arrays_per_engine * cu 1200 drivers/gpu/drm/amd/amdkfd/kfd_crat.c total_num_of_cu = (cu->array_count * cu_info.num_cu_per_sh); cu 1201 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->processor_id_low = get_and_inc_gpu_processor_id(total_num_of_cu); cu 1202 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->num_cu_per_array = cu_info.num_cu_per_sh; cu 1203 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->max_slots_scatch_cu = cu_info.max_scratch_slots_per_cu; cu 1204 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->num_banks = cu_info.num_shader_engines; cu 1205 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->lds_size_in_kb = cu_info.lds_size; cu 1207 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->hsa_capability = 0; cu 1213 drivers/gpu/drm/amd/amdkfd/kfd_crat.c cu->hsa_capability |= CRAT_CU_FLAGS_IOMMU_PRESENT; cu 1256 drivers/gpu/drm/amd/amdkfd/kfd_crat.c ret = kfd_fill_gpu_cache_info(kdev, cu->processor_id_low, cu 102 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c int i, se, sh, cu = 0; cu 123 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c se_mask[se] |= 1 << cu; cu 129 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c cu++; cu 131 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c } while (cu >= cu_per_se[se] && cu < 32); cu 141 drivers/hwmon/fam15h_power.c int cpu, cu; cu 149 drivers/hwmon/fam15h_power.c cu = cpu_data(cpu).cpu_core_id; cu 151 drivers/hwmon/fam15h_power.c rdmsrl_safe(MSR_F15H_CU_PWR_ACCUMULATOR, &data->cu_acc_power[cu]); cu 152 drivers/hwmon/fam15h_power.c rdmsrl_safe(MSR_F15H_PTSC, &data->cpu_sw_pwr_ptsc[cu]); cu 154 drivers/hwmon/fam15h_power.c data->cu_on[cu] = 1; cu 210 drivers/hwmon/fam15h_power.c int cu, cu_num, ret; cu 223 drivers/hwmon/fam15h_power.c for (cu = 0; cu < cu_num; cu++) { cu 224 drivers/hwmon/fam15h_power.c prev_cu_acc_power[cu] = data->cu_acc_power[cu]; cu 225 drivers/hwmon/fam15h_power.c prev_ptsc[cu] = data->cpu_sw_pwr_ptsc[cu]; cu 236 drivers/hwmon/fam15h_power.c for (cu = 0, avg_acc = 0; cu < cu_num; cu++) { cu 238 drivers/hwmon/fam15h_power.c if (data->cu_on[cu] == 0) cu 241 drivers/hwmon/fam15h_power.c if (data->cu_acc_power[cu] < prev_cu_acc_power[cu]) { cu 242 drivers/hwmon/fam15h_power.c jdelta[cu] = data->max_cu_acc_power + data->cu_acc_power[cu]; cu 243 drivers/hwmon/fam15h_power.c jdelta[cu] -= prev_cu_acc_power[cu]; cu 245 drivers/hwmon/fam15h_power.c jdelta[cu] = data->cu_acc_power[cu] - prev_cu_acc_power[cu]; cu 247 drivers/hwmon/fam15h_power.c tdelta = data->cpu_sw_pwr_ptsc[cu] - prev_ptsc[cu]; cu 248 drivers/hwmon/fam15h_power.c jdelta[cu] *= data->cpu_pwr_sample_ratio * 1000; cu 249 drivers/hwmon/fam15h_power.c do_div(jdelta[cu], tdelta); cu 252 drivers/hwmon/fam15h_power.c avg_acc += jdelta[cu]; cu 6477 drivers/infiniband/hw/hfi1/chip.c static u8 cu_to_vcu(u32 cu) cu 6479 drivers/infiniband/hw/hfi1/chip.c return ilog2(cu); cu 14528 drivers/infiniband/hw/hfi1/chip.c static void assign_cm_au_table(struct hfi1_devdata *dd, u32 cu, cu 14534 drivers/infiniband/hw/hfi1/chip.c 2ull * cu << cu 14536 drivers/infiniband/hw/hfi1/chip.c 4ull * cu << cu 14539 drivers/infiniband/hw/hfi1/chip.c 8ull * cu << cu 14541 drivers/infiniband/hw/hfi1/chip.c 16ull * cu << cu 14543 drivers/infiniband/hw/hfi1/chip.c 32ull * cu << cu 14545 drivers/infiniband/hw/hfi1/chip.c 64ull * cu << cu 83 drivers/infiniband/hw/hfi1/driver.c module_param_named(cu, hfi1_cu, uint, S_IRUGO); cu 84 drivers/infiniband/hw/hfi1/driver.c MODULE_PARM_DESC(cu, "Credit return units"); cu 810 drivers/media/platform/qcom/venus/helpers.c struct hfi_videocores_usage_type cu; cu 815 drivers/media/platform/qcom/venus/helpers.c cu.video_core_enable_mask = usage; cu 817 drivers/media/platform/qcom/venus/helpers.c return hfi_session_set_property(inst, ptype, &cu); cu 1201 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_videocores_usage_type *in = pdata, *cu = prop_data; cu 1203 drivers/media/platform/qcom/venus/hfi_cmds.c cu->video_core_enable_mask = in->video_core_enable_mask; cu 1204 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*cu); cu 721 drivers/net/vmxnet3/vmxnet3_defs.h } cu; cu 2537 drivers/net/vmxnet3/vmxnet3_drv.c union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo; cu 779 drivers/net/vmxnet3/vmxnet3_ethtool.c union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo; cu 403 kernel/time/clockevents.c struct ce_unbind *cu = arg; cu 407 kernel/time/clockevents.c res = __clockevents_try_unbind(cu->ce, smp_processor_id()); cu 409 kernel/time/clockevents.c res = clockevents_replace(cu->ce); cu 410 kernel/time/clockevents.c cu->res = res; cu 420 kernel/time/clockevents.c struct ce_unbind cu = { .ce = ced, .res = -ENODEV }; cu 422 kernel/time/clockevents.c smp_call_function_single(cpu, __clockevents_unbind, &cu, 1); cu 423 kernel/time/clockevents.c return cu.res; cu 1015 sound/pci/asihpi/hpi_internal.h struct hpi_control_union_msg cu; cu 1076 sound/pci/asihpi/hpi_internal.h union hpi_control_union_res cu; cu 1184 sound/pci/asihpi/hpi_internal.h struct hpi_control_union_msg cu; cu 1203 sound/pci/asihpi/hpi_internal.h union hpi_control_union_res cu; cu 391 sound/pci/asihpi/hpicmn.c phr->u.cu.tuner.s_level = 0; cu 395 sound/pci/asihpi/hpicmn.c phr->u.cu.tuner.s_level = cu 495 sound/pci/asihpi/hpicmn.c if (tocopy > sizeof(phr->u.cu.chars8.sz_data)) cu 496 sound/pci/asihpi/hpicmn.c tocopy = sizeof(phr->u.cu.chars8. cu 499 sound/pci/asihpi/hpicmn.c memcpy(phr->u.cu.chars8.sz_data, cu 502 sound/pci/asihpi/hpicmn.c phr->u.cu.chars8.remaining_chars = cu 1436 sound/pci/asihpi/hpifunc.c && (hr.u.cu.chars8.remaining_chars + 8) > cu 1445 sound/pci/asihpi/hpifunc.c c = hr.u.cu.chars8.sz_data[j]; cu 1457 sound/pci/asihpi/hpifunc.c if ((hr.u.cu.chars8.remaining_chars == 0) cu 1743 sound/pci/asihpi/hpifunc.c *pstatus = hr.u.cu.cobranet.status.status; cu 1746 sound/pci/asihpi/hpifunc.c hr.u.cu.cobranet.status.readable_size; cu 1749 sound/pci/asihpi/hpifunc.c hr.u.cu.cobranet.status.writeable_size; cu 2564 sound/pci/asihpi/hpifunc.c hm.u.cu.attribute = HPI_TUNER_LEVEL_AVG; cu 2567 sound/pci/asihpi/hpifunc.c *pw_level = hr.u.cu.tuner.s_level; cu 2580 sound/pci/asihpi/hpifunc.c hm.u.cu.attribute = HPI_TUNER_LEVEL_RAW; cu 2583 sound/pci/asihpi/hpifunc.c *pw_level = hr.u.cu.tuner.s_level; cu 2696 sound/pci/asihpi/hpifunc.c *(u32 *)&p_data[0] = hr.u.cu.tuner.rds.data[0]; cu 2697 sound/pci/asihpi/hpifunc.c *(u32 *)&p_data[4] = hr.u.cu.tuner.rds.data[1]; cu 2698 sound/pci/asihpi/hpifunc.c *(u32 *)&p_data[8] = hr.u.cu.tuner.rds.bLER; cu 447 tools/perf/util/unwind-libunwind-local.c unw_cursor_t __maybe_unused *cu,