ctx_dma 2999 drivers/crypto/caam/caamalg_qi2.c dma_addr_t ctx_dma; ctx_dma 3075 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = dma_map_single(dev, state->caam_ctx, ctx_len, flag); ctx_dma 3076 drivers/crypto/caam/caamalg_qi2.c if (dma_mapping_error(dev, state->ctx_dma)) { ctx_dma 3078 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = 0; ctx_dma 3082 drivers/crypto/caam/caamalg_qi2.c dma_to_qm_sg_one(qm_sg, state->ctx_dma, ctx_len, 0); ctx_dma 3336 drivers/crypto/caam/caamalg_qi2.c if (state->ctx_dma) { ctx_dma 3337 drivers/crypto/caam/caamalg_qi2.c dma_unmap_single(dev, state->ctx_dma, state->ctx_dma_len, flag); ctx_dma 3338 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = 0; ctx_dma 3551 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); ctx_dma 3636 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); ctx_dma 3730 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); ctx_dma 3815 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = dma_map_single(ctx->dev, state->caam_ctx, digestsize, ctx_dma 3817 drivers/crypto/caam/caamalg_qi2.c if (dma_mapping_error(ctx->dev, state->ctx_dma)) { ctx_dma 3819 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = 0; ctx_dma 3826 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); ctx_dma 3876 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = dma_map_single(ctx->dev, state->caam_ctx, digestsize, ctx_dma 3878 drivers/crypto/caam/caamalg_qi2.c if (dma_mapping_error(ctx->dev, state->ctx_dma)) { ctx_dma 3880 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = 0; ctx_dma 3898 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); ctx_dma 3995 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = dma_map_single(ctx->dev, state->caam_ctx, ctx_dma 3997 drivers/crypto/caam/caamalg_qi2.c if (dma_mapping_error(ctx->dev, state->ctx_dma)) { ctx_dma 3999 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = 0; ctx_dma 4010 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); ctx_dma 4109 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = dma_map_single(ctx->dev, state->caam_ctx, digestsize, ctx_dma 4111 drivers/crypto/caam/caamalg_qi2.c if (dma_mapping_error(ctx->dev, state->ctx_dma)) { ctx_dma 4113 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = 0; ctx_dma 4124 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); ctx_dma 4228 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = dma_map_single(ctx->dev, state->caam_ctx, ctx_dma 4230 drivers/crypto/caam/caamalg_qi2.c if (dma_mapping_error(ctx->dev, state->ctx_dma)) { ctx_dma 4232 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = 0; ctx_dma 4238 drivers/crypto/caam/caamalg_qi2.c dpaa2_fl_set_addr(out_fle, state->ctx_dma); ctx_dma 4289 drivers/crypto/caam/caamalg_qi2.c state->ctx_dma = 0; ctx_dma 108 drivers/crypto/caam/caamhash.c dma_addr_t ctx_dma; ctx_dma 168 drivers/crypto/caam/caamhash.c state->ctx_dma = dma_map_single(jrdev, state->caam_ctx, ctx_dma 170 drivers/crypto/caam/caamhash.c if (dma_mapping_error(jrdev, state->ctx_dma)) { ctx_dma 172 drivers/crypto/caam/caamhash.c state->ctx_dma = 0; ctx_dma 176 drivers/crypto/caam/caamhash.c append_seq_out_ptr(desc, state->ctx_dma, ctx_len, 0); ctx_dma 210 drivers/crypto/caam/caamhash.c state->ctx_dma = dma_map_single(jrdev, state->caam_ctx, ctx_len, flag); ctx_dma 211 drivers/crypto/caam/caamhash.c if (dma_mapping_error(jrdev, state->ctx_dma)) { ctx_dma 213 drivers/crypto/caam/caamhash.c state->ctx_dma = 0; ctx_dma 217 drivers/crypto/caam/caamhash.c dma_to_sec4_sg_one(sec4_sg, state->ctx_dma, ctx_len, 0); ctx_dma 593 drivers/crypto/caam/caamhash.c if (state->ctx_dma) { ctx_dma 594 drivers/crypto/caam/caamhash.c dma_unmap_single(dev, state->ctx_dma, state->ctx_dma_len, flag); ctx_dma 595 drivers/crypto/caam/caamhash.c state->ctx_dma = 0; ctx_dma 889 drivers/crypto/caam/caamhash.c append_seq_out_ptr(desc, state->ctx_dma, ctx->ctx_len, 0); ctx_dma 969 drivers/crypto/caam/caamhash.c append_seq_out_ptr(desc, state->ctx_dma, digestsize, 0); ctx_dma 1049 drivers/crypto/caam/caamhash.c append_seq_out_ptr(desc, state->ctx_dma, digestsize, 0); ctx_dma 1549 drivers/crypto/caam/caamhash.c state->ctx_dma = 0; ctx_dma 236 drivers/crypto/cavium/nitrox/nitrox_lib.c ctx->ctx_dma = dma + sizeof(struct ctx_hdr); ctx_dma 441 drivers/crypto/cavium/nitrox/nitrox_req.h dma_addr_t ctx_dma; ctx_dma 416 drivers/crypto/cavium/nitrox/nitrox_reqmgr.c ctx_handle = hdr->ctx_dma; ctx_dma 59 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c u32 ctx_dma; ctx_dma 88 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c desc->ctx_dma = FALCON_DMAIDX_UCODE; ctx_dma 632 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c bl_desc->ctx_dma = FALCON_DMAIDX_VIRT; ctx_dma 43 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c desc->ctx_dma = FALCON_DMAIDX_UCODE; ctx_dma 58 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.c bl_desc->ctx_dma = FALCON_DMAIDX_VIRT; ctx_dma 54 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r361.h u32 ctx_dma; ctx_dma 43 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c desc->ctx_dma = FALCON_DMAIDX_UCODE; ctx_dma 102 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c desc->ctx_dma = FALCON_SEC2_DMAIDX_UCODE; ctx_dma 136 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.c bl_desc->ctx_dma = FALCON_DMAIDX_VIRT; ctx_dma 33 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r370.h u32 ctx_dma; ctx_dma 46 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r375.c desc->ctx_dma = FALCON_DMAIDX_UCODE; ctx_dma 82 drivers/usb/host/xhci-trace.h __field(dma_addr_t, ctx_dma) ctx_dma 96 drivers/usb/host/xhci-trace.h __entry->ctx_dma = ctx->dma; ctx_dma 106 drivers/usb/host/xhci-trace.h (unsigned long long) __entry->ctx_dma, __entry->ctx_va