ctrl_default 92 drivers/crypto/picoxcell_crypto.c unsigned long ctrl_default; ctrl_default 135 drivers/crypto/picoxcell_crypto.c unsigned long ctrl_default; ctrl_default 522 drivers/crypto/picoxcell_crypto.c if ((spacc_alg->ctrl_default & SPACC_CRYPTO_ALG_MASK) == ctrl_default 593 drivers/crypto/picoxcell_crypto.c ctrl = spacc_alg->ctrl_default | (req->ctx_id << SPA_CTRL_CTX_IDX) | ctrl_default 854 drivers/crypto/picoxcell_crypto.c return (spacc_alg->ctrl_default & SPACC_CRYPTO_ALG_MASK) == ctrl_default 899 drivers/crypto/picoxcell_crypto.c ctrl = spacc_alg->ctrl_default | (req->ctx_id << SPA_CTRL_CTX_IDX) | ctrl_default 1232 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_AES | SPA_CTRL_CIPH_MODE_CBC, ctrl_default 1262 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_AES | SPA_CTRL_CIPH_MODE_ECB, ctrl_default 1288 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_DES | SPA_CTRL_CIPH_MODE_CBC, ctrl_default 1315 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_DES | SPA_CTRL_CIPH_MODE_ECB, ctrl_default 1341 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_DES | SPA_CTRL_CIPH_MODE_CBC, ctrl_default 1368 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_DES | SPA_CTRL_CIPH_MODE_ECB, ctrl_default 1395 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_AES | ctrl_default 1425 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_AES | ctrl_default 1457 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_AES | ctrl_default 1487 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_DES | ctrl_default 1517 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_AES | ctrl_default 1548 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_DES | ctrl_default 1581 drivers/crypto/picoxcell_crypto.c .ctrl_default = SPA_CTRL_CIPH_ALG_KASUMI |