ctrl2              30 arch/mips/include/asm/sgi/ioc.h 	volatile u8 ctrl2;
ctrl2             172 arch/mips/include/asm/txx9/tx4939.h 	__u32 ctrl2;
ctrl2             445 drivers/crypto/bcm/spu2.c static void spu2_dump_fmd_ctrl2(u64 ctrl2)
ctrl2             447 drivers/crypto/bcm/spu2.c 	packet_log(" FMD CTRL2 %#16llx\n", ctrl2);
ctrl2             450 drivers/crypto/bcm/spu2.c 		   ctrl2 & SPU2_AAD1_OFFSET,
ctrl2             451 drivers/crypto/bcm/spu2.c 		   (ctrl2 & SPU2_AAD1_LEN) >> SPU2_AAD1_LEN_SHIFT);
ctrl2             453 drivers/crypto/bcm/spu2.c 		   (ctrl2 & SPU2_AAD2_OFFSET) >> SPU2_AAD2_OFFSET_SHIFT);
ctrl2             455 drivers/crypto/bcm/spu2.c 		   (ctrl2 & SPU2_PL_OFFSET) >> SPU2_PL_OFFSET_SHIFT);
ctrl2             472 drivers/crypto/bcm/spu2.c 	spu2_dump_fmd_ctrl2(le64_to_cpu(fmd->ctrl2));
ctrl2             560 drivers/crypto/bcm/spu2.c 	u64 ctrl2;
ctrl2             581 drivers/crypto/bcm/spu2.c 	ctrl2 = aad1_offset |
ctrl2             590 drivers/crypto/bcm/spu2.c 	fmd->ctrl2 = cpu_to_le64(ctrl2);
ctrl2             734 drivers/crypto/bcm/spu2.c 	u64 ctrl2;
ctrl2             745 drivers/crypto/bcm/spu2.c 	ctrl2 = aad1_offset |
ctrl2             750 drivers/crypto/bcm/spu2.c 	fmd->ctrl2 = cpu_to_le64(ctrl2);
ctrl2              78 drivers/crypto/bcm/spu2.h 	u64 ctrl2;
ctrl2             197 drivers/extcon/extcon-max14577.c 	u8 ctrl1, ctrl2 = 0;
ctrl2             223 drivers/extcon/extcon-max14577.c 		ctrl2 |= CTRL2_CPEN_MASK;	/* LowPwr=0, CPEn=1 */
ctrl2             225 drivers/extcon/extcon-max14577.c 		ctrl2 |= CTRL2_LOWPWR_MASK;	/* LowPwr=1, CPEn=0 */
ctrl2             229 drivers/extcon/extcon-max14577.c 			CTRL2_LOWPWR_MASK | CTRL2_CPEN_MASK, ctrl2);
ctrl2             237 drivers/extcon/extcon-max14577.c 		ctrl1, ctrl2, attached ? "attached" : "detached");
ctrl2             260 drivers/extcon/extcon-max77693.c 	unsigned int ctrl1, ctrl2 = 0;
ctrl2             275 drivers/extcon/extcon-max77693.c 		ctrl2 |= MAX77693_CONTROL2_CPEN_MASK;	/* LowPwr=0, CPEn=1 */
ctrl2             277 drivers/extcon/extcon-max77693.c 		ctrl2 |= MAX77693_CONTROL2_LOWPWR_MASK;	/* LowPwr=1, CPEn=0 */
ctrl2             282 drivers/extcon/extcon-max77693.c 			ctrl2);
ctrl2             290 drivers/extcon/extcon-max77693.c 		ctrl1, ctrl2, attached ? "attached" : "detached");
ctrl2             204 drivers/extcon/extcon-max77843.c 	unsigned int ctrl1, ctrl2;
ctrl2             226 drivers/extcon/extcon-max77843.c 		ctrl2 = MAX77843_MUIC_CONTROL2_CPEN_MASK;
ctrl2             228 drivers/extcon/extcon-max77843.c 		ctrl2 = MAX77843_MUIC_CONTROL2_LOWPWR_MASK;
ctrl2             233 drivers/extcon/extcon-max77843.c 			MAX77843_MUIC_CONTROL2_CPEN_MASK, ctrl2);
ctrl2             241 drivers/extcon/extcon-max77843.c 		ctrl1, ctrl2, attached ? "attached" : "detached");
ctrl2             198 drivers/extcon/extcon-max8997.c 	u8 ctrl1, ctrl2 = 0;
ctrl2             213 drivers/extcon/extcon-max8997.c 		ctrl2 |= CONTROL2_CPEN_MASK;	/* LowPwr=0, CPEn=1 */
ctrl2             215 drivers/extcon/extcon-max8997.c 		ctrl2 |= CONTROL2_LOWPWR_MASK;	/* LowPwr=1, CPEn=0 */
ctrl2             218 drivers/extcon/extcon-max8997.c 			MAX8997_MUIC_REG_CONTROL2, ctrl2,
ctrl2             227 drivers/extcon/extcon-max8997.c 		ctrl1, ctrl2, attached ? "attached" : "detached");
ctrl2              60 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	u32 ctrl2 = readl(priv->base + CRT_CTRL2);
ctrl2              66 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
ctrl2              72 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	u32 ctrl2 = readl(priv->base + CRT_CTRL2);
ctrl2              75 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c 	writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
ctrl2             188 drivers/gpu/drm/bridge/analogix-anx78xx.c 	u8 ctrl2 = SP_AUX_EN;
ctrl2             198 drivers/gpu/drm/bridge/analogix-anx78xx.c 		ctrl2 |= SP_ADDR_ONLY;
ctrl2             224 drivers/gpu/drm/bridge/analogix-anx78xx.c 				 SP_AUX_EN, ctrl2);
ctrl2             116 drivers/leds/leds-is31fl319x.c 	u8 ctrl1 = 0, ctrl2 = 0;
ctrl2             147 drivers/leds/leds-is31fl319x.c 			ctrl2 |= on << (i - 6); /* 6..8 => bit 0..2 */
ctrl2             150 drivers/leds/leds-is31fl319x.c 	if (ctrl1 > 0 || ctrl2 > 0) {
ctrl2             152 drivers/leds/leds-is31fl319x.c 			ctrl1, ctrl2);
ctrl2             154 drivers/leds/leds-is31fl319x.c 		regmap_write(is31->regmap, IS31FL319X_CTRL2, ctrl2);
ctrl2             168 drivers/mailbox/bcm-pdc-mailbox.c 	u32 ctrl2;      /* buffer count and address extension */
ctrl2             533 drivers/mailbox/bcm-pdc-mailbox.c 	rxd->ctrl2 = cpu_to_le32(buf_len);
ctrl2             561 drivers/mailbox/bcm-pdc-mailbox.c 	txd->ctrl2 = cpu_to_le32(buf_len);
ctrl2             206 drivers/media/i2c/ov2659.c 	u8 ctrl2;
ctrl2             944 drivers/media/i2c/ov2659.c 	ov2659->pll.ctrl2 = ctrl2_reg;
ctrl2             957 drivers/media/i2c/ov2659.c 		{REG_SC_PLL_CTRL2, ov2659->pll.ctrl2},
ctrl2              41 drivers/media/platform/vsp1/vsp1_sru.c 	u32 ctrl2;
ctrl2              56 drivers/media/platform/vsp1/vsp1_sru.c 		.ctrl2 = VI6_SRU_CTRL2_PARAMS(24, 40, 255),
ctrl2              59 drivers/media/platform/vsp1/vsp1_sru.c 		.ctrl2 = VI6_SRU_CTRL2_PARAMS(8, 16, 255),
ctrl2              62 drivers/media/platform/vsp1/vsp1_sru.c 		.ctrl2 = VI6_SRU_CTRL2_PARAMS(36, 60, 255),
ctrl2              65 drivers/media/platform/vsp1/vsp1_sru.c 		.ctrl2 = VI6_SRU_CTRL2_PARAMS(12, 27, 255),
ctrl2              68 drivers/media/platform/vsp1/vsp1_sru.c 		.ctrl2 = VI6_SRU_CTRL2_PARAMS(48, 80, 255),
ctrl2              71 drivers/media/platform/vsp1/vsp1_sru.c 		.ctrl2 = VI6_SRU_CTRL2_PARAMS(16, 36, 255),
ctrl2             301 drivers/media/platform/vsp1/vsp1_sru.c 	vsp1_sru_write(sru, dlb, VI6_SRU_CTRL2, param->ctrl2);
ctrl2             885 drivers/misc/lis3lv02d/lis3lv02d.c 	int ctrl2 = p->hipass_ctrl;
ctrl2             910 drivers/misc/lis3lv02d/lis3lv02d.c 		ctrl2 ^= HP_FF_WU1; /* Xor to keep compatible with old pdata*/
ctrl2             918 drivers/misc/lis3lv02d/lis3lv02d.c 		ctrl2 ^= HP_FF_WU2; /* Xor to keep compatible with old pdata*/
ctrl2             921 drivers/misc/lis3lv02d/lis3lv02d.c 	lis3->write(lis3, CTRL_REG2, ctrl2);
ctrl2             111 drivers/mmc/host/sdhci-pci-gli.c 	u16 ctrl2;
ctrl2             170 drivers/mmc/host/sdhci-pci-gli.c 	ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
ctrl2             171 drivers/mmc/host/sdhci-pci-gli.c 	ctrl2 &= ~SDHCI_CTRL_TUNED_CLK;
ctrl2             172 drivers/mmc/host/sdhci-pci-gli.c 	sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2);
ctrl2             190 drivers/mmc/host/sdhci-pci-gli.c 	ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
ctrl2             191 drivers/mmc/host/sdhci-pci-gli.c 	ctrl2 &= ~SDHCI_CTRL_TUNED_CLK;
ctrl2             192 drivers/mmc/host/sdhci-pci-gli.c 	sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2);
ctrl2             124 drivers/mmc/host/sdhci.c 	u16 ctrl2;
ctrl2             126 drivers/mmc/host/sdhci.c 	ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
ctrl2             127 drivers/mmc/host/sdhci.c 	if (ctrl2 & SDHCI_CTRL_V4_MODE)
ctrl2             130 drivers/mmc/host/sdhci.c 	ctrl2 |= SDHCI_CTRL_V4_MODE;
ctrl2             131 drivers/mmc/host/sdhci.c 	sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2);
ctrl2             272 drivers/mmc/host/sdhci.c 	u16 ctrl2;
ctrl2             299 drivers/mmc/host/sdhci.c 			ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
ctrl2             300 drivers/mmc/host/sdhci.c 			ctrl2 |= SDHCI_CTRL_64BIT_ADDR;
ctrl2             301 drivers/mmc/host/sdhci.c 			sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2);
ctrl2            1160 drivers/mmc/host/sdhci.c 	u16 ctrl2;
ctrl2            1170 drivers/mmc/host/sdhci.c 		ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
ctrl2            1172 drivers/mmc/host/sdhci.c 			ctrl2 |= SDHCI_CMD23_ENABLE;
ctrl2            1174 drivers/mmc/host/sdhci.c 			ctrl2 &= ~SDHCI_CMD23_ENABLE;
ctrl2            1175 drivers/mmc/host/sdhci.c 		sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2);
ctrl2             220 drivers/net/can/flexcan.c 		u32 ctrl2;	/* MX6, VF610 */
ctrl2            1140 drivers/net/can/flexcan.c 		reg_ctrl2 = priv->read(&regs->ctrl2);
ctrl2            1142 drivers/net/can/flexcan.c 		priv->write(reg_ctrl2, &regs->ctrl2);
ctrl2            1191 drivers/net/can/flexcan.c 		reg_ctrl2 = priv->read(&regs->ctrl2);
ctrl2            1193 drivers/net/can/flexcan.c 		priv->write(reg_ctrl2, &regs->ctrl2);
ctrl2            4950 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	u32 old_ctrl2, ctrl2;
ctrl2            4955 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	old_ctrl2 = ctrl2 = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
ctrl2            4964 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	ctrl2 &= ~(MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PORT_RESET_MASK |
ctrl2            4970 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		ctrl2 |= MVPP2_GMAC_PCS_ENABLE_MASK;
ctrl2            4976 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		ctrl2 |= MVPP2_GMAC_PCS_ENABLE_MASK | MVPP2_GMAC_INBAND_AN_MASK;
ctrl2            5054 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	    (old_ctrl2 ^ ctrl2) & MVPP2_GMAC_INBAND_AN_MASK ||
ctrl2            5070 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	if (old_ctrl2 != ctrl2)
ctrl2            5071 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		writel(ctrl2, port->base + MVPP2_GMAC_CTRL_2_REG);
ctrl2              17 drivers/net/phy/phy-c45.c 	int ctrl1, ctrl2, ret;
ctrl2              27 drivers/net/phy/phy-c45.c 	ctrl2 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2);
ctrl2              28 drivers/net/phy/phy-c45.c 	if (ctrl2 < 0)
ctrl2              29 drivers/net/phy/phy-c45.c 		return ctrl2;
ctrl2              36 drivers/net/phy/phy-c45.c 	ctrl2 &= ~(MDIO_PMA_CTRL2_TYPE | 0x30);
ctrl2              40 drivers/net/phy/phy-c45.c 		ctrl2 |= MDIO_PMA_CTRL2_10BT;
ctrl2              44 drivers/net/phy/phy-c45.c 		ctrl2 |= MDIO_PMA_CTRL2_100BTX;
ctrl2              49 drivers/net/phy/phy-c45.c 		ctrl2 |= MDIO_PMA_CTRL2_1000BT;
ctrl2              54 drivers/net/phy/phy-c45.c 		ctrl2 |= MDIO_PMA_CTRL2_2_5GBT;
ctrl2              59 drivers/net/phy/phy-c45.c 		ctrl2 |= MDIO_PMA_CTRL2_5GBT;
ctrl2              64 drivers/net/phy/phy-c45.c 		ctrl2 |= MDIO_PMA_CTRL2_10GBT;
ctrl2              74 drivers/net/phy/phy-c45.c 	ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2, ctrl2);
ctrl2             202 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c 	__le32 ctrl2;	/* buffer count and address extension */
ctrl2             303 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c 	return parity32(dd->addrlow ^ dd->addrhigh ^ dd->ctrl1 ^ dd->ctrl2);
ctrl2             718 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c 	u32 ctrl2 = bufcount & D64_CTRL2_BC_MASK;
ctrl2             725 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c 		ddring[outidx].ctrl2 = cpu_to_le32(ctrl2);
ctrl2             733 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c 		ctrl2 |= (ae << D64_CTRL2_AE_SHIFT) & D64_CTRL2_AE;
ctrl2             737 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c 		ddring[outidx].ctrl2 = cpu_to_le32(ctrl2);
ctrl2             741 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c 			ddring[outidx].ctrl2 =
ctrl2             742 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c 			     cpu_to_le32(ctrl2 | D64_CTRL2_PARITY);
ctrl2            1518 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c 		    (le32_to_cpu(di->txd64[i].ctrl2) &
ctrl2             106 drivers/pci/vc.c 	u32 ctrl, header, cap1, ctrl2;
ctrl2             139 drivers/pci/vc.c 		pci_read_config_dword(dev->bus->self, ctrl_pos2, &ctrl2);
ctrl2             140 drivers/pci/vc.c 		if ((ctrl2 & PCI_VC_RES_CTRL_ID) == id) {
ctrl2             150 drivers/pci/vc.c 	if (ctrl2 & PCI_VC_RES_CTRL_ENABLE) {
ctrl2             151 drivers/pci/vc.c 		ctrl2 &= ~PCI_VC_RES_CTRL_ENABLE;
ctrl2             152 drivers/pci/vc.c 		pci_write_config_dword(link, ctrl_pos2, ctrl2);
ctrl2             156 drivers/pci/vc.c 	ctrl2 |= PCI_VC_RES_CTRL_ENABLE;
ctrl2             157 drivers/pci/vc.c 	pci_write_config_dword(link, ctrl_pos2, ctrl2);
ctrl2             214 drivers/rtc/rtc-rs5c372.c 	unsigned char ctrl2 = rs5c->regs[RS5C_REG_CTRL2];
ctrl2             222 drivers/rtc/rtc-rs5c372.c 		if ((rs5c->type == rtc_r2025sd && !(ctrl2 & R2x2x_CTRL2_XSTP)) ||
ctrl2             223 drivers/rtc/rtc-rs5c372.c 		    (rs5c->type == rtc_r2221tl &&  (ctrl2 & R2x2x_CTRL2_XSTP))) {
ctrl2             229 drivers/rtc/rtc-rs5c372.c 		if (ctrl2 & RS5C_CTRL2_XSTP) {
ctrl2             262 drivers/rtc/rtc-rs5c372.c 	unsigned char	ctrl2;
ctrl2             287 drivers/rtc/rtc-rs5c372.c 	ctrl2 = i2c_smbus_read_byte_data(client, addr);
ctrl2             293 drivers/rtc/rtc-rs5c372.c 		ctrl2 &= ~(R2x2x_CTRL2_VDET | R2x2x_CTRL2_PON);
ctrl2             295 drivers/rtc/rtc-rs5c372.c 			ctrl2 |= R2x2x_CTRL2_XSTP;
ctrl2             297 drivers/rtc/rtc-rs5c372.c 			ctrl2 &= ~R2x2x_CTRL2_XSTP;
ctrl2             300 drivers/rtc/rtc-rs5c372.c 		ctrl2 &= ~RS5C_CTRL2_XSTP;
ctrl2             304 drivers/rtc/rtc-rs5c372.c 	if (i2c_smbus_write_byte_data(client, addr, ctrl2) < 0) {
ctrl2             107 drivers/rtc/rtc-rx8025.c 	int ctrl2;
ctrl2             109 drivers/rtc/rtc-rx8025.c 	ctrl2 = rx8025_read_reg(rx8025->client, RX8025_REG_CTRL2);
ctrl2             110 drivers/rtc/rtc-rx8025.c 	if (ctrl2 < 0)
ctrl2             111 drivers/rtc/rtc-rx8025.c 		return ctrl2;
ctrl2             113 drivers/rtc/rtc-rx8025.c 	if (ctrl2 & RX8025_BIT_CTRL2_VDET)
ctrl2             116 drivers/rtc/rtc-rx8025.c 	if (ctrl2 & RX8025_BIT_CTRL2_PON) {
ctrl2             121 drivers/rtc/rtc-rx8025.c 	if (!(ctrl2 & RX8025_BIT_CTRL2_XST)) {
ctrl2             131 drivers/rtc/rtc-rx8025.c 	int ctrl2 = rx8025_read_reg(client, RX8025_REG_CTRL2);
ctrl2             133 drivers/rtc/rtc-rx8025.c 	if (ctrl2 < 0)
ctrl2             134 drivers/rtc/rtc-rx8025.c 		return ctrl2;
ctrl2             136 drivers/rtc/rtc-rx8025.c 	ctrl2 &= ~(RX8025_BIT_CTRL2_PON | RX8025_BIT_CTRL2_VDET);
ctrl2             139 drivers/rtc/rtc-rx8025.c 				ctrl2 | RX8025_BIT_CTRL2_XST);
ctrl2             250 drivers/rtc/rtc-rx8025.c 	u8 ctrl[2], ctrl2;
ctrl2             270 drivers/rtc/rtc-rx8025.c 		ctrl2 = ctrl[1];
ctrl2             271 drivers/rtc/rtc-rx8025.c 		ctrl2 &= ~(RX8025_BIT_CTRL2_CTFG | RX8025_BIT_CTRL2_WAFG |
ctrl2             274 drivers/rtc/rtc-rx8025.c 		err = rx8025_write_reg(client, RX8025_REG_CTRL2, ctrl2);
ctrl2             286 drivers/rtc/rtc-rx8025.c 	int ctrl2, err;
ctrl2             295 drivers/rtc/rtc-rx8025.c 	ctrl2 = rx8025_read_reg(client, RX8025_REG_CTRL2);
ctrl2             296 drivers/rtc/rtc-rx8025.c 	if (ctrl2 < 0)
ctrl2             297 drivers/rtc/rtc-rx8025.c 		return ctrl2;
ctrl2             300 drivers/rtc/rtc-rx8025.c 		__func__, ald[0], ald[1], ctrl2);
ctrl2             313 drivers/rtc/rtc-rx8025.c 	t->pending = (ctrl2 & RX8025_BIT_CTRL2_DAFG) && t->enabled;
ctrl2              39 drivers/spi/spi-pic32.c 	u32 ctrl2;
ctrl2             140 drivers/staging/comedi/drivers/me_daq.c 	unsigned short ctrl2;		/* Mirror of CONTROL_2 register */
ctrl2             169 drivers/staging/comedi/drivers/me_daq.c 		devpriv->ctrl2 |= ME_CTRL2_PORT_A_ENA;
ctrl2             171 drivers/staging/comedi/drivers/me_daq.c 		devpriv->ctrl2 &= ~ME_CTRL2_PORT_A_ENA;
ctrl2             173 drivers/staging/comedi/drivers/me_daq.c 		devpriv->ctrl2 |= ME_CTRL2_PORT_B_ENA;
ctrl2             175 drivers/staging/comedi/drivers/me_daq.c 		devpriv->ctrl2 &= ~ME_CTRL2_PORT_B_ENA;
ctrl2             177 drivers/staging/comedi/drivers/me_daq.c 	writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG);
ctrl2             251 drivers/staging/comedi/drivers/me_daq.c 	devpriv->ctrl2 &= ~(ME_CTRL2_ADFIFO_ENA | ME_CTRL2_CHANLIST_ENA);
ctrl2             252 drivers/staging/comedi/drivers/me_daq.c 	writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG);
ctrl2             257 drivers/staging/comedi/drivers/me_daq.c 	devpriv->ctrl2 |= (ME_CTRL2_ADFIFO_ENA | ME_CTRL2_CHANLIST_ENA);
ctrl2             258 drivers/staging/comedi/drivers/me_daq.c 	writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG);
ctrl2             307 drivers/staging/comedi/drivers/me_daq.c 	devpriv->ctrl2 |= ME_CTRL2_DAC_ENA;
ctrl2             308 drivers/staging/comedi/drivers/me_daq.c 	writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG);
ctrl2             311 drivers/staging/comedi/drivers/me_daq.c 	devpriv->ctrl2 |= ME_CTRL2_BUFFERED_DAC;
ctrl2             312 drivers/staging/comedi/drivers/me_daq.c 	writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG);
ctrl2             422 drivers/staging/comedi/drivers/me_daq.c 	devpriv->ctrl2 = 0;
ctrl2             979 drivers/tty/serial/mxs-auart.c 	u32 bm, ctrl, ctrl2, div;
ctrl2             985 drivers/tty/serial/mxs-auart.c 	ctrl2 = mxs_read(s, REG_CTRL2);
ctrl2            1043 drivers/tty/serial/mxs-auart.c 		ctrl2 |= AUART_CTRL2_RXE;
ctrl2            1045 drivers/tty/serial/mxs-auart.c 		ctrl2 &= ~AUART_CTRL2_RXE;
ctrl2            1052 drivers/tty/serial/mxs-auart.c 	ctrl2 &= ~(AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN);
ctrl2            1064 drivers/tty/serial/mxs-auart.c 				ctrl2 |= AUART_CTRL2_TXDMAE | AUART_CTRL2_RXDMAE
ctrl2            1069 drivers/tty/serial/mxs-auart.c 		ctrl2 |= AUART_CTRL2_RTSEN;
ctrl2            1071 drivers/tty/serial/mxs-auart.c 			ctrl2 |= AUART_CTRL2_CTSEN;
ctrl2            1092 drivers/tty/serial/mxs-auart.c 	mxs_write(ctrl2, s, REG_CTRL2);
ctrl2              38 drivers/usb/cdns3/drd.h 	__le32 ctrl2;
ctrl2            1177 drivers/usb/host/sl811-hcd.c 		u8	ctrl2 = SL811HS_CTL2_INIT;
ctrl2            1185 drivers/usb/host/sl811-hcd.c 			ctrl2 |= SL811HS_CTL2MASK_DSWAP;
ctrl2            1191 drivers/usb/host/sl811-hcd.c 		sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
ctrl2             147 drivers/usb/host/sl811.h 	u8			ctrl1, ctrl2, irq_enable;
ctrl2             891 sound/pci/oxygen/xonar_wm87x6.c 	u16 ctrl1, ctrl2;
ctrl2             901 sound/pci/oxygen/xonar_wm87x6.c 		ctrl2 = data->wm8776_regs[WM8776_ALCCTRL2];
ctrl2             905 sound/pci/oxygen/xonar_wm87x6.c 					    ctrl2 & ~WM8776_LCEN);
ctrl2             912 sound/pci/oxygen/xonar_wm87x6.c 					    ctrl2 | WM8776_LCEN);
ctrl2             920 sound/pci/oxygen/xonar_wm87x6.c 					    ctrl2 | WM8776_LCEN);
ctrl2             374 sound/soc/codecs/ak4613.c 	u8 fmt_ctrl, ctrl2;
ctrl2             381 sound/soc/codecs/ak4613.c 		ctrl2 = DFS_NORMAL_SPEED;
ctrl2             386 sound/soc/codecs/ak4613.c 		ctrl2 = DFS_DOUBLE_SPEED;
ctrl2             390 sound/soc/codecs/ak4613.c 		ctrl2 = DFS_QUAD_SPEED;
ctrl2             434 sound/soc/codecs/ak4613.c 	snd_soc_component_update_bits(component, CTRL2, DFS_MASK, ctrl2);
ctrl2             408 sound/soc/codecs/ssm2518.c 	unsigned int ctrl1 = 0, ctrl2 = 0;
ctrl2             424 sound/soc/codecs/ssm2518.c 		ctrl2 |= SSM2518_SAI_CTRL2_BCLK_INVERT;
ctrl2             431 sound/soc/codecs/ssm2518.c 		ctrl2 |= SSM2518_SAI_CTRL2_BCLK_INVERT;
ctrl2             453 sound/soc/codecs/ssm2518.c 		ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_PULSE;
ctrl2             458 sound/soc/codecs/ssm2518.c 		ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_PULSE;
ctrl2             467 sound/soc/codecs/ssm2518.c 		ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_INVERT;
ctrl2             473 sound/soc/codecs/ssm2518.c 	return regmap_write(ssm2518->regmap, SSM2518_REG_SAI_CTRL2, ctrl2);
ctrl2             527 sound/soc/codecs/ssm2518.c 	unsigned int ctrl1, ctrl2;
ctrl2             561 sound/soc/codecs/ssm2518.c 		ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_16;
ctrl2             564 sound/soc/codecs/ssm2518.c 		ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_24;
ctrl2             567 sound/soc/codecs/ssm2518.c 		ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_32;
ctrl2             605 sound/soc/codecs/ssm2518.c 		SSM2518_SAI_CTRL2_SLOT_WIDTH_MASK, ctrl2);