csr_val 327 drivers/crypto/qat/qat_common/qat_hal.c unsigned int ae_csr, unsigned int csr_val) csr_val 337 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, ae_csr, csr_val); csr_val 347 drivers/crypto/qat/qat_common/qat_hal.c unsigned int cur_ctx, csr_val; csr_val 351 drivers/crypto/qat/qat_common/qat_hal.c csr_val = qat_hal_rd_ae_csr(handle, ae, ae_csr); csr_val 354 drivers/crypto/qat/qat_common/qat_hal.c return csr_val; csr_val 456 drivers/crypto/qat/qat_common/qat_hal.c unsigned int csr_val; csr_val 462 drivers/crypto/qat/qat_common/qat_hal.c csr_val = ADF_CSR_RD(csr_addr, 0); csr_val 463 drivers/crypto/qat/qat_common/qat_hal.c if ((csr_val & ESRAM_AUTO_TINIT) && (csr_val & ESRAM_AUTO_TINIT_DONE)) csr_val 466 drivers/crypto/qat/qat_common/qat_hal.c csr_val = ADF_CSR_RD(csr_addr, 0); csr_val 467 drivers/crypto/qat/qat_common/qat_hal.c csr_val |= ESRAM_AUTO_TINIT; csr_val 468 drivers/crypto/qat/qat_common/qat_hal.c ADF_CSR_WR(csr_addr, 0, csr_val); csr_val 472 drivers/crypto/qat/qat_common/qat_hal.c csr_val = ADF_CSR_RD(csr_addr, 0); csr_val 473 drivers/crypto/qat/qat_common/qat_hal.c } while (!(csr_val & ESRAM_AUTO_TINIT_DONE) && times--); csr_val 634 drivers/crypto/qat/qat_common/qat_hal.c unsigned int csr_val = 0; csr_val 639 drivers/crypto/qat/qat_common/qat_hal.c csr_val = qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL); csr_val 640 drivers/crypto/qat/qat_common/qat_hal.c csr_val &= ~(1 << MMC_SHARE_CS_BITPOS); csr_val 641 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, csr_val); csr_val 642 drivers/crypto/qat/qat_common/qat_hal.c csr_val = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); csr_val 643 drivers/crypto/qat/qat_common/qat_hal.c csr_val &= IGNORE_W1C_MASK; csr_val 644 drivers/crypto/qat/qat_common/qat_hal.c csr_val |= CE_NN_MODE; csr_val 645 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, csr_val); csr_val 761 drivers/crypto/qat/qat_common/qat_hal.c unsigned int csr_val = 0; csr_val 763 drivers/crypto/qat/qat_common/qat_hal.c csr_val = qat_hal_rd_ae_csr(handle, ae, SIGNATURE_ENABLE); csr_val 764 drivers/crypto/qat/qat_common/qat_hal.c csr_val |= 0x1; csr_val 765 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, SIGNATURE_ENABLE, csr_val); csr_val 883 drivers/crypto/qat/qat_common/qat_hal.c unsigned int csr_val = 0, newcsr_val; csr_val 942 drivers/crypto/qat/qat_common/qat_hal.c csr_val = qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL); csr_val 943 drivers/crypto/qat/qat_common/qat_hal.c newcsr_val = CLR_BIT(csr_val, MMC_SHARE_CS_BITPOS);