csc_c12            58 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c 				csc_c12, *regval1);
csc_c12            59 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h 	type csc_c12
csc_c12           140 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_GAMUT_REMAP_C12;
csc_c12           141 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12;
csc_c12           235 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_OCSC_C12;
csc_c12           236 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.masks.csc_c12 = dpp->tf_mask->CM_OCSC_C12;
csc_c12           489 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_ICSC_C12;
csc_c12           490 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.masks.csc_c12 = dpp->tf_mask->CM_ICSC_C12;
csc_c12           150 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	ocsc_regs.shifts.csc_c12 = mpc20->mpc_shift->MPC_OCSC_C12_A;
csc_c12           151 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A;
csc_c12           190 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	ocsc_regs.shifts.csc_c12 = mpc20->mpc_shift->MPC_OCSC_C12_A;
csc_c12           191 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	ocsc_regs.masks.csc_c12 = mpc20->mpc_mask->MPC_OCSC_C12_A;