csc_c11            57 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c 				csc_c11, *regval0,
csc_c11            58 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h 	type csc_c11; \
csc_c11           138 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_GAMUT_REMAP_C11;
csc_c11           139 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.masks.csc_c11  = dpp->tf_mask->CM_GAMUT_REMAP_C11;
csc_c11           233 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_OCSC_C11;
csc_c11           234 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.masks.csc_c11  = dpp->tf_mask->CM_OCSC_C11;
csc_c11           487 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_ICSC_C11;
csc_c11           488 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	gam_regs.masks.csc_c11  = dpp->tf_mask->CM_ICSC_C11;
csc_c11           148 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	ocsc_regs.shifts.csc_c11 = mpc20->mpc_shift->MPC_OCSC_C11_A;
csc_c11           149 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	ocsc_regs.masks.csc_c11  = mpc20->mpc_mask->MPC_OCSC_C11_A;
csc_c11           188 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	ocsc_regs.shifts.csc_c11 = mpc20->mpc_shift->MPC_OCSC_C11_A;
csc_c11           189 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	ocsc_regs.masks.csc_c11  = mpc20->mpc_mask->MPC_OCSC_C11_A;