csbases           398 drivers/edac/amd64_edac.c 		csbase		= pvt->csels[dct].csbases[csrow];
csbases           410 drivers/edac/amd64_edac.c 		csbase          = pvt->csels[dct].csbases[csrow];
csbases           426 drivers/edac/amd64_edac.c 		csbase		= pvt->csels[dct].csbases[csrow];
csbases           451 drivers/edac/amd64_edac.c 	pvt->csels[dct].csbases[i]
csbases           968 drivers/edac/amd64_edac.c 			base = &pvt->csels[umc].csbases[cs];
csbases          1019 drivers/edac/amd64_edac.c 		u32 *base0 = &pvt->csels[0].csbases[cs];
csbases          1020 drivers/edac/amd64_edac.c 		u32 *base1 = &pvt->csels[1].csbases[cs];
csbases          2169 drivers/edac/amd64_edac.c 	u32 *dcsb = ctrl ? pvt->csels[1].csbases : pvt->csels[0].csbases;
csbases          2184 drivers/edac/amd64_edac.c 				 pvt->csels[1].csbases :
csbases          2185 drivers/edac/amd64_edac.c 				 pvt->csels[0].csbases;
csbases          2188 drivers/edac/amd64_edac.c 		dcsb = pvt->csels[1].csbases;
csbases           174 drivers/edac/amd64_edac.h #define csrow_enabled(i, dct, pvt)	((pvt)->csels[(dct)].csbases[(i)]     & DCSB_CS_ENABLE)
csbases           320 drivers/edac/amd64_edac.h 	u32 csbases[NUM_CHIPSELECTS];