DC_I2C_DDC1_SETUP 47 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_DATA_DRIVE_EN), 0, DC_I2C_DDC1_SETUP 48 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_CLK_DRIVE_EN), 0, DC_I2C_DDC1_SETUP 49 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_DATA_DRIVE_SEL), 0, DC_I2C_DDC1_SETUP 50 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_INTRA_TRANSACTION_DELAY), 0, DC_I2C_DDC1_SETUP 51 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_INTRA_BYTE_DELAY), 0); DC_I2C_DDC1_SETUP 323 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_TIME_LIMIT), i2c_setup_limit, DC_I2C_DDC1_SETUP 324 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_ENABLE), 1); DC_I2C_DDC1_SETUP 329 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_TIME_LIMIT), i2c_setup_limit, DC_I2C_DDC1_SETUP 330 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_SEND_RESET_LENGTH), reset_length, DC_I2C_DDC1_SETUP 331 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c FN(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_ENABLE), 1); DC_I2C_DDC1_SETUP 102 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_ENABLE, mask_sh),\ DC_I2C_DDC1_SETUP 103 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_TIME_LIMIT, mask_sh),\ DC_I2C_DDC1_SETUP 104 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_DATA_DRIVE_EN, mask_sh),\ DC_I2C_DDC1_SETUP 105 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_CLK_DRIVE_EN, mask_sh),\ DC_I2C_DDC1_SETUP 106 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_DATA_DRIVE_SEL, mask_sh),\ DC_I2C_DDC1_SETUP 107 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_INTRA_TRANSACTION_DELAY, mask_sh),\ DC_I2C_DDC1_SETUP 108 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_INTRA_BYTE_DELAY, mask_sh),\ DC_I2C_DDC1_SETUP 232 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h I2C_SF(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_SEND_RESET_LENGTH, mask_sh) DC_I2C_DDC1_SETUP 101 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h SF_DDC(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_ENABLE, mask_sh),\ DC_I2C_DDC1_SETUP 102 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h SF_DDC(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_EDID_DETECT_ENABLE, mask_sh),\ DC_I2C_DDC1_SETUP 103 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h SF_DDC(DC_I2C_DDC1_SETUP, DC_I2C_DDC1_EDID_DETECT_MODE, mask_sh),\