crtcs 78 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[work->crtc_id]; crtcs 854 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c vbl_start -= adev->mode_info.crtcs[pipe]->lb_vblank_lead_lines; crtcs 471 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c crtc = (struct drm_crtc *)minfo->crtcs[i]; crtcs 1126 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->mode_info.crtcs[pipe]) { crtcs 1139 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c &adev->mode_info.crtcs[pipe]->base.hwmode); crtcs 319 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h struct amdgpu_crtc *crtcs[AMDGPU_MAX_CRTCS]; crtcs 263 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c if (adev->mode_info.crtcs[i] && crtcs 264 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c adev->mode_info.crtcs[i]->enabled && crtcs 266 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c pll_id == adev->mode_info.crtcs[i]->pll_id) { crtcs 238 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; crtcs 1161 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->mode_info.crtcs[i]->base.enabled) crtcs 1165 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c mode = &adev->mode_info.crtcs[i]->base.mode; crtcs 1166 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_size = dce_v10_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); crtcs 1167 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_program_watermarks(adev, adev->mode_info.crtcs[i], crtcs 2562 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->mode_info.crtcs[i] && crtcs 2563 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.crtcs[i]->enabled && crtcs 2565 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { crtcs 2685 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.crtcs[index] = amdgpu_crtc; crtcs 3121 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; crtcs 256 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; crtcs 1187 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->mode_info.crtcs[i]->base.enabled) crtcs 1191 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c mode = &adev->mode_info.crtcs[i]->base.mode; crtcs 1192 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_size = dce_v11_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); crtcs 1193 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_program_watermarks(adev, adev->mode_info.crtcs[i], crtcs 2641 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->mode_info.crtcs[i] && crtcs 2642 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.crtcs[i]->enabled && crtcs 2644 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { crtcs 2793 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.crtcs[index] = amdgpu_crtc; crtcs 3247 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; crtcs 193 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; crtcs 1066 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->mode_info.crtcs[i]->base.enabled) crtcs 1070 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c mode0 = &adev->mode_info.crtcs[i]->base.mode; crtcs 1071 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c mode1 = &adev->mode_info.crtcs[i+1]->base.mode; crtcs 1072 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode0, mode1); crtcs 1073 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_program_watermarks(adev, adev->mode_info.crtcs[i], lb_size, num_heads); crtcs 1074 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i+1], mode1, mode0); crtcs 1075 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_program_watermarks(adev, adev->mode_info.crtcs[i+1], lb_size, num_heads); crtcs 2450 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->mode_info.crtcs[i] && crtcs 2451 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.crtcs[i]->enabled && crtcs 2453 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { crtcs 2573 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.crtcs[index] = amdgpu_crtc; crtcs 2998 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; crtcs 186 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; crtcs 1098 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->mode_info.crtcs[i]->base.enabled) crtcs 1102 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c mode = &adev->mode_info.crtcs[i]->base.mode; crtcs 1103 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c lb_size = dce_v8_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); crtcs 1104 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_program_watermarks(adev, adev->mode_info.crtcs[i], crtcs 2463 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->mode_info.crtcs[i] && crtcs 2464 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.crtcs[i]->enabled && crtcs 2466 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { crtcs 2593 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.crtcs[index] = amdgpu_crtc; crtcs 3090 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; crtcs 236 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.crtcs[index] = amdgpu_crtc; crtcs 413 drivers/gpu/drm/amd/amdgpu/dce_virtual.c memset(adev->mode_info.crtcs, 0, sizeof(adev->mode_info.crtcs[0]) * AMDGPU_MAX_CRTCS); crtcs 469 drivers/gpu/drm/amd/amdgpu/dce_virtual.c if (adev->mode_info.crtcs[i]) crtcs 647 drivers/gpu/drm/amd/amdgpu/dce_virtual.c amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; crtcs 706 drivers/gpu/drm/amd/amdgpu/dce_virtual.c if (crtc >= adev->mode_info.num_crtc || !adev->mode_info.crtcs[crtc]) { crtcs 711 drivers/gpu/drm/amd/amdgpu/dce_virtual.c if (state && !adev->mode_info.crtcs[crtc]->vsync_timer_enabled) { crtcs 713 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_init(&adev->mode_info.crtcs[crtc]->vblank_timer, crtcs 715 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_set_expires(&adev->mode_info.crtcs[crtc]->vblank_timer, crtcs 717 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.crtcs[crtc]->vblank_timer.function = crtcs 719 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_start(&adev->mode_info.crtcs[crtc]->vblank_timer, crtcs 721 drivers/gpu/drm/amd/amdgpu/dce_virtual.c } else if (!state && adev->mode_info.crtcs[crtc]->vsync_timer_enabled) { crtcs 723 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_cancel(&adev->mode_info.crtcs[crtc]->vblank_timer); crtcs 726 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.crtcs[crtc]->vsync_timer_enabled = state; crtcs 5787 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_crtc = adev->mode_info.crtcs[i]; crtcs 164 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc]; crtcs 187 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc]; crtcs 247 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c return adev->mode_info.crtcs[0]; crtcs 4824 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm->adev->mode_info.crtcs[crtc_index] = acrtc; crtcs 624 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc_id]; crtcs 515 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c crtc = &kms->crtcs[kms->n_crtcs]; crtcs 579 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c err = komeda_crtc_add(kms, &kms->crtcs[i]); crtcs 53 drivers/gpu/drm/arm/display/komeda/komeda_kms.c komeda_crtc_handle_event(&kms->crtcs[i], &evts); crtcs 125 drivers/gpu/drm/arm/display/komeda/komeda_kms.h struct komeda_crtc crtcs[KOMEDA_MAX_PIPELINES]; crtcs 214 drivers/gpu/drm/arm/display/komeda/komeda_plane.c crtc = &kms->crtcs[i]; crtcs 232 drivers/gpu/drm/arm/display/komeda/komeda_plane.c kcrtc = &kms->crtcs[i]; crtcs 186 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c err = komeda_wb_connector_add(kms, &kms->crtcs[i]); crtcs 931 drivers/gpu/drm/arm/malidp_planes.c unsigned long crtcs = 1 << drm->mode_config.num_crtc; crtcs 986 drivers/gpu/drm/arm/malidp_planes.c ret = drm_universal_plane_init(drm, &plane->base, crtcs, crtcs 540 drivers/gpu/drm/armada/armada_overlay.c int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs) crtcs 557 drivers/gpu/drm/armada/armada_overlay.c ret = drm_universal_plane_init(dev, overlay, crtcs, crtcs 66 drivers/gpu/drm/drm_atomic.c kfree(state->crtcs); crtcs 91 drivers/gpu/drm/drm_atomic.c state->crtcs = kcalloc(dev->mode_config.num_crtc, crtcs 92 drivers/gpu/drm/drm_atomic.c sizeof(*state->crtcs), GFP_KERNEL); crtcs 93 drivers/gpu/drm/drm_atomic.c if (!state->crtcs) crtcs 171 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc = state->crtcs[i].ptr; crtcs 177 drivers/gpu/drm/drm_atomic.c state->crtcs[i].state); crtcs 179 drivers/gpu/drm/drm_atomic.c state->crtcs[i].ptr = NULL; crtcs 180 drivers/gpu/drm/drm_atomic.c state->crtcs[i].state = NULL; crtcs 181 drivers/gpu/drm/drm_atomic.c state->crtcs[i].old_state = NULL; crtcs 182 drivers/gpu/drm/drm_atomic.c state->crtcs[i].new_state = NULL; crtcs 184 drivers/gpu/drm/drm_atomic.c if (state->crtcs[i].commit) { crtcs 185 drivers/gpu/drm/drm_atomic.c drm_crtc_commit_put(state->crtcs[i].commit); crtcs 186 drivers/gpu/drm/drm_atomic.c state->crtcs[i].commit = NULL; crtcs 310 drivers/gpu/drm/drm_atomic.c state->crtcs[index].state = crtc_state; crtcs 311 drivers/gpu/drm/drm_atomic.c state->crtcs[index].old_state = crtc->state; crtcs 312 drivers/gpu/drm/drm_atomic.c state->crtcs[index].new_state = crtc_state; crtcs 313 drivers/gpu/drm/drm_atomic.c state->crtcs[index].ptr = crtc; crtcs 1455 drivers/gpu/drm/drm_atomic_helper.c old_state->crtcs[i].last_vblank_count = drm_crtc_vblank_count(crtc); crtcs 1463 drivers/gpu/drm/drm_atomic_helper.c old_state->crtcs[i].last_vblank_count != crtcs 1497 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_commit *commit = old_state->crtcs[i].commit; crtcs 1500 drivers/gpu/drm/drm_atomic_helper.c crtc = old_state->crtcs[i].ptr; crtcs 2067 drivers/gpu/drm/drm_atomic_helper.c state->crtcs[i].commit = commit; crtcs 2771 drivers/gpu/drm/drm_atomic_helper.c state->crtcs[i].state = old_crtc_state; crtcs 3247 drivers/gpu/drm/drm_atomic_helper.c state->crtcs[i].old_state = crtc->state; crtcs 343 drivers/gpu/drm/drm_atomic_uapi.c state->crtcs[drm_crtc_index(crtc)].out_fence_ptr = fence_ptr; crtcs 351 drivers/gpu/drm/drm_atomic_uapi.c fence_ptr = state->crtcs[drm_crtc_index(crtc)].out_fence_ptr; crtcs 352 drivers/gpu/drm/drm_atomic_uapi.c state->crtcs[drm_crtc_index(crtc)].out_fence_ptr = NULL; crtcs 438 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc **crtcs, *crtc; crtcs 453 drivers/gpu/drm/drm_client_modeset.c crtcs = kcalloc(connector_count, sizeof(*crtcs), GFP_KERNEL); crtcs 454 drivers/gpu/drm/drm_client_modeset.c if (!crtcs) crtcs 488 drivers/gpu/drm/drm_client_modeset.c crtcs[n] = crtc; crtcs 489 drivers/gpu/drm/drm_client_modeset.c memcpy(crtcs, best_crtcs, n * sizeof(*crtcs)); crtcs 491 drivers/gpu/drm/drm_client_modeset.c crtcs, modes, n + 1, width, height); crtcs 494 drivers/gpu/drm/drm_client_modeset.c memcpy(best_crtcs, crtcs, connector_count * sizeof(*crtcs)); crtcs 498 drivers/gpu/drm/drm_client_modeset.c kfree(crtcs); crtcs 506 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc **crtcs, crtcs 590 drivers/gpu/drm/drm_client_modeset.c if (crtcs[j] == new_crtc) { crtcs 635 drivers/gpu/drm/drm_client_modeset.c crtcs[i] = new_crtc; crtcs 699 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc **crtcs; crtcs 729 drivers/gpu/drm/drm_client_modeset.c crtcs = kcalloc(connector_count, sizeof(*crtcs), GFP_KERNEL); crtcs 733 drivers/gpu/drm/drm_client_modeset.c if (!crtcs || !modes || !enabled || !offsets) { crtcs 748 drivers/gpu/drm/drm_client_modeset.c if (!drm_client_firmware_config(client, connectors, connector_count, crtcs, crtcs 751 drivers/gpu/drm/drm_client_modeset.c memset(crtcs, 0, connector_count * sizeof(*crtcs)); crtcs 764 drivers/gpu/drm/drm_client_modeset.c crtcs, modes, 0, width, height); crtcs 772 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc *crtc = crtcs[i]; crtcs 798 drivers/gpu/drm/drm_client_modeset.c kfree(crtcs); crtcs 589 drivers/gpu/drm/gma500/cdv_device.c .crtcs = 2, crtcs 521 drivers/gpu/drm/gma500/mdfld_device.c .crtcs = 3, crtcs 541 drivers/gpu/drm/gma500/oaktrail_device.c .crtcs = 2, crtcs 323 drivers/gpu/drm/gma500/psb_device.c .crtcs = 2, crtcs 618 drivers/gpu/drm/gma500/psb_drv.h int crtcs; /* Number of CRTCs */ crtcs 2006 drivers/gpu/drm/i2c/tda998x_drv.c u32 crtcs = 0; crtcs 2010 drivers/gpu/drm/i2c/tda998x_drv.c crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); crtcs 2013 drivers/gpu/drm/i2c/tda998x_drv.c if (crtcs == 0) { crtcs 2015 drivers/gpu/drm/i2c/tda998x_drv.c crtcs = 1 << 0; crtcs 2018 drivers/gpu/drm/i2c/tda998x_drv.c priv->encoder.possible_crtcs = crtcs; crtcs 391 drivers/gpu/drm/i915/display/intel_display.h ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \ crtcs 392 drivers/gpu/drm/i915/display/intel_display.h (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \ crtcs 408 drivers/gpu/drm/i915/display/intel_display.h ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \ crtcs 409 drivers/gpu/drm/i915/display/intel_display.h (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \ crtcs 410 drivers/gpu/drm/i915/display/intel_display.h (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \ crtcs 480 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c priv->crtcs[i]->funcs->destroy(priv->crtcs[i]); crtcs 563 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c priv->crtcs[priv->num_crtcs++] = crtc; crtcs 85 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c if (status & mdp4_crtc_vblank(priv->crtcs[id])) crtcs 391 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c priv->crtcs[priv->num_crtcs++] = crtc; crtcs 98 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c if (status & mdp5_crtc_vblank(priv->crtcs[id])) crtcs 534 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c priv->crtcs[priv->num_crtcs++] = crtc; crtcs 608 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c crtc = priv->crtcs[pipe]; crtcs 667 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c crtc = priv->crtcs[pipe]; crtcs 183 drivers/gpu/drm/msm/msm_drv.c kms->funcs->enable_vblank(kms, priv->crtcs[vbl_work->crtc_id]); crtcs 185 drivers/gpu/drm/msm/msm_drv.c kms->funcs->disable_vblank(kms, priv->crtcs[vbl_work->crtc_id]); crtcs 503 drivers/gpu/drm/msm/msm_drv.c priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id; crtcs 187 drivers/gpu/drm/msm/msm_drv.h struct drm_crtc *crtcs[MAX_CRTCS]; crtcs 2325 drivers/gpu/drm/nouveau/dispnv50/disp.c int crtcs, ret, i; crtcs 2366 drivers/gpu/drm/nouveau/dispnv50/disp.c crtcs = nvif_rd32(&device->object, 0x610060) & 0xff; crtcs 2369 drivers/gpu/drm/nouveau/dispnv50/disp.c crtcs = nvif_rd32(&device->object, 0x612004) & 0xf; crtcs 2371 drivers/gpu/drm/nouveau/dispnv50/disp.c crtcs = 0x3; crtcs 2373 drivers/gpu/drm/nouveau/dispnv50/disp.c for (i = 0; i < fls(crtcs); i++) { crtcs 2374 drivers/gpu/drm/nouveau/dispnv50/disp.c if (!(crtcs & (1 << i))) crtcs 466 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->mode_info.crtcs[i] && crtcs 467 drivers/gpu/drm/radeon/atombios_crtc.c rdev->mode_info.crtcs[i]->enabled && crtcs 469 drivers/gpu/drm/radeon/atombios_crtc.c pll_id == rdev->mode_info.crtcs[i]->pll_id) { crtcs 2189 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->mode_info.crtcs[i] && crtcs 2190 drivers/gpu/drm/radeon/atombios_crtc.c rdev->mode_info.crtcs[i]->enabled && crtcs 2192 drivers/gpu/drm/radeon/atombios_crtc.c radeon_crtc->pll_id == rdev->mode_info.crtcs[i]->pll_id) { crtcs 9398 drivers/gpu/drm/radeon/cik.c if (rdev->mode_info.crtcs[i]->base.enabled) crtcs 9402 drivers/gpu/drm/radeon/cik.c mode = &rdev->mode_info.crtcs[i]->base.mode; crtcs 9403 drivers/gpu/drm/radeon/cik.c lb_size = dce8_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode); crtcs 9404 drivers/gpu/drm/radeon/cik.c dce8_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); crtcs 1421 drivers/gpu/drm/radeon/evergreen.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; crtcs 1444 drivers/gpu/drm/radeon/evergreen.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; crtcs 2334 drivers/gpu/drm/radeon/evergreen.c if (rdev->mode_info.crtcs[i]->base.enabled) crtcs 2338 drivers/gpu/drm/radeon/evergreen.c mode0 = &rdev->mode_info.crtcs[i]->base.mode; crtcs 2339 drivers/gpu/drm/radeon/evergreen.c mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; crtcs 2340 drivers/gpu/drm/radeon/evergreen.c lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); crtcs 2341 drivers/gpu/drm/radeon/evergreen.c evergreen_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); crtcs 2342 drivers/gpu/drm/radeon/evergreen.c lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); crtcs 2343 drivers/gpu/drm/radeon/evergreen.c evergreen_program_watermarks(rdev, rdev->mode_info.crtcs[i+1], lb_size, num_heads); crtcs 164 drivers/gpu/drm/radeon/r100.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; crtcs 197 drivers/gpu/drm/radeon/r100.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; crtcs 3227 drivers/gpu/drm/radeon/r100.c if (rdev->mode_info.crtcs[0]->base.enabled) { crtcs 3229 drivers/gpu/drm/radeon/r100.c rdev->mode_info.crtcs[0]->base.primary->fb; crtcs 3231 drivers/gpu/drm/radeon/r100.c mode1 = &rdev->mode_info.crtcs[0]->base.mode; crtcs 3235 drivers/gpu/drm/radeon/r100.c if (rdev->mode_info.crtcs[1]->base.enabled) { crtcs 3237 drivers/gpu/drm/radeon/r100.c rdev->mode_info.crtcs[1]->base.primary->fb; crtcs 3239 drivers/gpu/drm/radeon/r100.c mode2 = &rdev->mode_info.crtcs[1]->base.mode; crtcs 3645 drivers/gpu/drm/radeon/r100.c rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); crtcs 3648 drivers/gpu/drm/radeon/r100.c rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); crtcs 286 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; crtcs 342 drivers/gpu/drm/radeon/radeon_display.c &rdev->mode_info.crtcs[crtc_id]->base.hwmode)) && crtcs 367 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; crtcs 414 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[work->crtc_id]; crtcs 688 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.crtcs[index] = radeon_crtc; crtcs 1951 drivers/gpu/drm/radeon/radeon_display.c vbl_start -= rdev->mode_info.crtcs[pipe]->lb_vblank_lead_lines; crtcs 261 drivers/gpu/drm/radeon/radeon_kms.c crtc = (struct drm_crtc *)minfo->crtcs[i]; crtcs 773 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->mode_info.crtcs[pipe]) { crtcs 786 drivers/gpu/drm/radeon/radeon_kms.c &rdev->mode_info.crtcs[pipe]->base.hwmode); crtcs 247 drivers/gpu/drm/radeon/radeon_mode.h struct radeon_crtc *crtcs[RADEON_MAX_CRTCS]; crtcs 1777 drivers/gpu/drm/radeon/radeon_pm.c &rdev->mode_info.crtcs[crtc]->base.hwmode); crtcs 120 drivers/gpu/drm/radeon/rs600.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; crtcs 151 drivers/gpu/drm/radeon/rs600.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; crtcs 905 drivers/gpu/drm/radeon/rs600.c if (rdev->mode_info.crtcs[0]->base.enabled) crtcs 906 drivers/gpu/drm/radeon/rs600.c mode0 = &rdev->mode_info.crtcs[0]->base.mode; crtcs 907 drivers/gpu/drm/radeon/rs600.c if (rdev->mode_info.crtcs[1]->base.enabled) crtcs 908 drivers/gpu/drm/radeon/rs600.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; crtcs 253 drivers/gpu/drm/radeon/rs690.c rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); crtcs 256 drivers/gpu/drm/radeon/rs690.c rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); crtcs 599 drivers/gpu/drm/radeon/rs690.c if (rdev->mode_info.crtcs[0]->base.enabled) crtcs 600 drivers/gpu/drm/radeon/rs690.c mode0 = &rdev->mode_info.crtcs[0]->base.mode; crtcs 601 drivers/gpu/drm/radeon/rs690.c if (rdev->mode_info.crtcs[1]->base.enabled) crtcs 602 drivers/gpu/drm/radeon/rs690.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; crtcs 626 drivers/gpu/drm/radeon/rs690.c rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_high, false); crtcs 627 drivers/gpu/drm/radeon/rs690.c rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_high, false); crtcs 629 drivers/gpu/drm/radeon/rs690.c rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_low, true); crtcs 630 drivers/gpu/drm/radeon/rs690.c rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_low, true); crtcs 63 drivers/gpu/drm/radeon/rs780_dpm.c crtc = (struct drm_crtc *)minfo->crtcs[i]; crtcs 1245 drivers/gpu/drm/radeon/rv515.c if (rdev->mode_info.crtcs[0]->base.enabled) crtcs 1246 drivers/gpu/drm/radeon/rv515.c mode0 = &rdev->mode_info.crtcs[0]->base.mode; crtcs 1247 drivers/gpu/drm/radeon/rv515.c if (rdev->mode_info.crtcs[1]->base.enabled) crtcs 1248 drivers/gpu/drm/radeon/rv515.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; crtcs 1251 drivers/gpu/drm/radeon/rv515.c rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_high, false); crtcs 1252 drivers/gpu/drm/radeon/rv515.c rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_high, false); crtcs 1254 drivers/gpu/drm/radeon/rv515.c rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_low, false); crtcs 1255 drivers/gpu/drm/radeon/rv515.c rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_low, false); crtcs 1287 drivers/gpu/drm/radeon/rv515.c if (rdev->mode_info.crtcs[0]->base.enabled) crtcs 1288 drivers/gpu/drm/radeon/rv515.c mode0 = &rdev->mode_info.crtcs[0]->base.mode; crtcs 1289 drivers/gpu/drm/radeon/rv515.c if (rdev->mode_info.crtcs[1]->base.enabled) crtcs 1290 drivers/gpu/drm/radeon/rv515.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; crtcs 810 drivers/gpu/drm/radeon/rv770.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; crtcs 848 drivers/gpu/drm/radeon/rv770.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; crtcs 2477 drivers/gpu/drm/radeon/si.c if (rdev->mode_info.crtcs[i]->base.enabled) crtcs 2481 drivers/gpu/drm/radeon/si.c mode0 = &rdev->mode_info.crtcs[i]->base.mode; crtcs 2482 drivers/gpu/drm/radeon/si.c mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; crtcs 2483 drivers/gpu/drm/radeon/si.c lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); crtcs 2484 drivers/gpu/drm/radeon/si.c dce6_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); crtcs 2485 drivers/gpu/drm/radeon/si.c lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); crtcs 2486 drivers/gpu/drm/radeon/si.c dce6_program_watermarks(rdev, rdev->mode_info.crtcs[i+1], lb_size, num_heads); crtcs 5327 drivers/gpu/drm/radeon/si_dpm.c radeon_crtc = rdev->mode_info.crtcs[i]; crtcs 1135 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = &rcdu->crtcs[swindex]; crtcs 82 drivers/gpu/drm/rcar-du/rcar_du_drv.h struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS]; crtcs 108 drivers/gpu/drm/rcar-du/rcar_du_group.c rcrtc = rcdu->crtcs; crtcs 115 drivers/gpu/drm/rcar-du/rcar_du_group.c rcrtc = &rcdu->crtcs[rgrp->index * 2]; crtcs 216 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_crtc *rcrtc = &rgrp->dev->crtcs[rgrp->index * 2]; crtcs 277 drivers/gpu/drm/rcar-du/rcar_du_group.c crtc = &rcdu->crtcs[index * 2]; crtcs 321 drivers/gpu/drm/rcar-du/rcar_du_group.c rcrtc = &rcdu->crtcs[rgrp->index * 2 + i]; crtcs 589 drivers/gpu/drm/rcar-du/rcar_du_kms.c rcdu->crtcs[i].vsp = &rcdu->vsps[j]; crtcs 590 drivers/gpu/drm/rcar-du/rcar_du_kms.c rcdu->crtcs[i].vsp_pipe = cells >= 1 ? args.args[0] : 0; crtcs 751 drivers/gpu/drm/rcar-du/rcar_du_kms.c struct rcar_du_crtc *rcrtc = &rcdu->crtcs[i]; crtcs 756 drivers/gpu/drm/rcar-du/rcar_du_plane.c unsigned int crtcs; crtcs 766 drivers/gpu/drm/rcar-du/rcar_du_plane.c crtcs = ((1 << rcdu->num_crtcs) - 1) & (3 << (2 * rgrp->index)); crtcs 776 drivers/gpu/drm/rcar-du/rcar_du_plane.c ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs, crtcs 345 drivers/gpu/drm/rcar-du/rcar_du_vsp.c unsigned int crtcs) crtcs 349 drivers/gpu/drm/rcar-du/rcar_du_vsp.c unsigned int num_crtcs = hweight32(crtcs); crtcs 384 drivers/gpu/drm/rcar-du/rcar_du_vsp.c ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs, crtcs 60 drivers/gpu/drm/rcar-du/rcar_du_vsp.h unsigned int crtcs); crtcs 72 drivers/gpu/drm/rcar-du/rcar_du_vsp.h unsigned int crtcs) crtcs 72 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c u32 crtcs = 0; crtcs 86 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c crtcs |= drm_of_crtc_port_mask(drm, remote_port); crtcs 91 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c crtcs = drm_of_find_possible_crtcs(drm, node); crtcs 97 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c return crtcs; crtcs 156 drivers/gpu/drm/vc4/vc4_kms.c if (!state->crtcs[i].ptr || !state->crtcs[i].commit) crtcs 159 drivers/gpu/drm/vc4/vc4_kms.c vc4_crtc = to_vc4_crtc(state->crtcs[i].ptr); crtcs 342 include/drm/drm_atomic.h struct __drm_crtcs_state *crtcs; crtcs 484 include/drm/drm_atomic.h return state->crtcs[drm_crtc_index(crtc)].state; crtcs 499 include/drm/drm_atomic.h return state->crtcs[drm_crtc_index(crtc)].old_state; crtcs 513 include/drm/drm_atomic.h return state->crtcs[drm_crtc_index(crtc)].new_state; crtcs 755 include/drm/drm_atomic.h for_each_if ((__state)->crtcs[__i].ptr && \ crtcs 756 include/drm/drm_atomic.h ((crtc) = (__state)->crtcs[__i].ptr, \ crtcs 757 include/drm/drm_atomic.h (old_crtc_state) = (__state)->crtcs[__i].old_state, \ crtcs 758 include/drm/drm_atomic.h (new_crtc_state) = (__state)->crtcs[__i].new_state, 1)) crtcs 775 include/drm/drm_atomic.h for_each_if ((__state)->crtcs[__i].ptr && \ crtcs 776 include/drm/drm_atomic.h ((crtc) = (__state)->crtcs[__i].ptr, \ crtcs 777 include/drm/drm_atomic.h (old_crtc_state) = (__state)->crtcs[__i].old_state, 1)) crtcs 794 include/drm/drm_atomic.h for_each_if ((__state)->crtcs[__i].ptr && \ crtcs 795 include/drm/drm_atomic.h ((crtc) = (__state)->crtcs[__i].ptr, \ crtcs 796 include/drm/drm_atomic.h (new_crtc_state) = (__state)->crtcs[__i].new_state, 1)) crtcs 23 include/drm/drm_lease.h uint32_t drm_lease_filter_crtcs(struct drm_file *file_priv, uint32_t crtcs);