crtc_mask 1437 drivers/gpu/drm/drm_atomic_helper.c unsigned crtc_mask = 0; crtc_mask 1454 drivers/gpu/drm/drm_atomic_helper.c crtc_mask |= drm_crtc_mask(crtc); crtc_mask 1459 drivers/gpu/drm/drm_atomic_helper.c if (!(crtc_mask & drm_crtc_mask(crtc))) crtc_mask 581 drivers/gpu/drm/gma500/framebuffer.c int crtc_mask = 0, clone_mask = 0; crtc_mask 586 drivers/gpu/drm/gma500/framebuffer.c crtc_mask = (1 << 0); crtc_mask 590 drivers/gpu/drm/gma500/framebuffer.c crtc_mask = dev_priv->ops->sdvo_mask; crtc_mask 594 drivers/gpu/drm/gma500/framebuffer.c crtc_mask = dev_priv->ops->lvds_mask; crtc_mask 598 drivers/gpu/drm/gma500/framebuffer.c crtc_mask = (1 << 0); crtc_mask 602 drivers/gpu/drm/gma500/framebuffer.c crtc_mask = (1 << 2); crtc_mask 606 drivers/gpu/drm/gma500/framebuffer.c crtc_mask = dev_priv->ops->hdmi_mask; crtc_mask 610 drivers/gpu/drm/gma500/framebuffer.c crtc_mask = (1 << 0) | (1 << 1); crtc_mask 614 drivers/gpu/drm/gma500/framebuffer.c crtc_mask = (1 << 1); crtc_mask 617 drivers/gpu/drm/gma500/framebuffer.c encoder->possible_crtcs = crtc_mask; crtc_mask 114 drivers/gpu/drm/gma500/psb_intel_drv.h int crtc_mask; crtc_mask 2251 drivers/gpu/drm/gma500/psb_intel_sdvo.c psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1); crtc_mask 707 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c u32 crtc_mask = drm_of_find_possible_crtcs(drm_dev, dev->of_node); crtc_mask 709 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c if (!crtc_mask) { crtc_mask 714 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c encoder->possible_crtcs = crtc_mask; crtc_mask 1587 drivers/gpu/drm/i915/display/icl_dsi.c encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); crtc_mask 1004 drivers/gpu/drm/i915/display/intel_crt.c crt->base.crtc_mask = (1 << 0); crtc_mask 1006 drivers/gpu/drm/i915/display/intel_crt.c crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); crtc_mask 4336 drivers/gpu/drm/i915/display/intel_ddi.c intel_encoder->crtc_mask |= BIT(pipe); crtc_mask 13174 drivers/gpu/drm/i915/display/intel_display.c unsigned int crtc_mask; crtc_mask 13194 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(pll->active_mask & ~pll->state.crtc_mask, crtc_mask 13196 drivers/gpu/drm/i915/display/intel_display.c pll->active_mask, pll->state.crtc_mask); crtc_mask 13201 drivers/gpu/drm/i915/display/intel_display.c crtc_mask = drm_crtc_mask(&crtc->base); crtc_mask 13204 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(!(pll->active_mask & crtc_mask), crtc_mask 13208 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(pll->active_mask & crtc_mask, crtc_mask 13212 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(!(pll->state.crtc_mask & crtc_mask), crtc_mask 13214 drivers/gpu/drm/i915/display/intel_display.c crtc_mask, pll->state.crtc_mask); crtc_mask 13234 drivers/gpu/drm/i915/display/intel_display.c unsigned int crtc_mask = drm_crtc_mask(&crtc->base); crtc_mask 13237 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(pll->active_mask & crtc_mask, crtc_mask 13240 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(pll->state.crtc_mask & crtc_mask, crtc_mask 15538 drivers/gpu/drm/i915/display/intel_display.c encoder->base.possible_crtcs = encoder->crtc_mask; crtc_mask 16708 drivers/gpu/drm/i915/display/intel_display.c pll->state.crtc_mask = 0; crtc_mask 16715 drivers/gpu/drm/i915/display/intel_display.c pll->state.crtc_mask |= 1 << crtc->pipe; crtc_mask 16717 drivers/gpu/drm/i915/display/intel_display.c pll->active_mask = pll->state.crtc_mask; crtc_mask 16720 drivers/gpu/drm/i915/display/intel_display.c pll->info->name, pll->state.crtc_mask, pll->on); crtc_mask 346 drivers/gpu/drm/i915/display/intel_display.h #define for_each_intel_crtc_mask(dev, intel_crtc, crtc_mask) \ crtc_mask 350 drivers/gpu/drm/i915/display/intel_display.h for_each_if((crtc_mask) & drm_crtc_mask(&intel_crtc->base)) crtc_mask 190 drivers/gpu/drm/i915/display/intel_display_types.h int crtc_mask; crtc_mask 7313 drivers/gpu/drm/i915/display/intel_dp.c intel_encoder->crtc_mask = 1 << 2; crtc_mask 7315 drivers/gpu/drm/i915/display/intel_dp.c intel_encoder->crtc_mask = (1 << 0) | (1 << 1); crtc_mask 7317 drivers/gpu/drm/i915/display/intel_dp.c intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); crtc_mask 618 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_encoder->crtc_mask = 0x7; crtc_mask 147 drivers/gpu/drm/i915/display/intel_dpll_mgr.c WARN_ON(!pll->state.crtc_mask); crtc_mask 169 drivers/gpu/drm/i915/display/intel_dpll_mgr.c unsigned int crtc_mask = drm_crtc_mask(&crtc->base); crtc_mask 178 drivers/gpu/drm/i915/display/intel_dpll_mgr.c if (WARN_ON(!(pll->state.crtc_mask & crtc_mask)) || crtc_mask 179 drivers/gpu/drm/i915/display/intel_dpll_mgr.c WARN_ON(pll->active_mask & crtc_mask)) crtc_mask 182 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pll->active_mask |= crtc_mask; crtc_mask 214 drivers/gpu/drm/i915/display/intel_dpll_mgr.c unsigned int crtc_mask = drm_crtc_mask(&crtc->base); crtc_mask 224 drivers/gpu/drm/i915/display/intel_dpll_mgr.c if (WARN_ON(!(pll->active_mask & crtc_mask))) crtc_mask 234 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pll->active_mask &= ~crtc_mask; crtc_mask 264 drivers/gpu/drm/i915/display/intel_dpll_mgr.c if (shared_dpll[i].crtc_mask == 0) { crtc_mask 276 drivers/gpu/drm/i915/display/intel_dpll_mgr.c shared_dpll[i].crtc_mask, crtc_mask 304 drivers/gpu/drm/i915/display/intel_dpll_mgr.c if (shared_dpll[id].crtc_mask == 0) crtc_mask 310 drivers/gpu/drm/i915/display/intel_dpll_mgr.c shared_dpll[id].crtc_mask |= 1 << crtc->pipe; crtc_mask 320 drivers/gpu/drm/i915/display/intel_dpll_mgr.c shared_dpll[pll->info->id].crtc_mask &= ~(1 << crtc->pipe); crtc_mask 229 drivers/gpu/drm/i915/display/intel_dpll_mgr.h unsigned crtc_mask; crtc_mask 508 drivers/gpu/drm/i915/display/intel_dvo.c intel_encoder->crtc_mask = (1 << 0) | (1 << 1); crtc_mask 3219 drivers/gpu/drm/i915/display/intel_hdmi.c intel_encoder->crtc_mask = 1 << 2; crtc_mask 3221 drivers/gpu/drm/i915/display/intel_hdmi.c intel_encoder->crtc_mask = (1 << 0) | (1 << 1); crtc_mask 3223 drivers/gpu/drm/i915/display/intel_hdmi.c intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); crtc_mask 903 drivers/gpu/drm/i915/display/intel_lvds.c intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); crtc_mask 905 drivers/gpu/drm/i915/display/intel_lvds.c intel_encoder->crtc_mask = (1 << 0) | (1 << 1); crtc_mask 907 drivers/gpu/drm/i915/display/intel_lvds.c intel_encoder->crtc_mask = (1 << 1); crtc_mask 2924 drivers/gpu/drm/i915/display/intel_sdvo.c intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); crtc_mask 1951 drivers/gpu/drm/i915/display/intel_tv.c intel_encoder->crtc_mask = (1 << 0) | (1 << 1); crtc_mask 1873 drivers/gpu/drm/i915/display/vlv_dsi.c intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); crtc_mask 1875 drivers/gpu/drm/i915/display/vlv_dsi.c intel_encoder->crtc_mask = BIT(PIPE_A); crtc_mask 1877 drivers/gpu/drm/i915/display/vlv_dsi.c intel_encoder->crtc_mask = BIT(PIPE_B); crtc_mask 2837 drivers/gpu/drm/i915/i915_debugfs.c pll->state.crtc_mask, pll->active_mask, yesno(pll->on)); crtc_mask 129 drivers/gpu/drm/imx/imx-drm-core.c uint32_t crtc_mask = drm_of_find_possible_crtcs(drm, np); crtc_mask 137 drivers/gpu/drm/imx/imx-drm-core.c if (crtc_mask == 0) crtc_mask 140 drivers/gpu/drm/imx/imx-drm-core.c encoder->possible_crtcs = crtc_mask; crtc_mask 308 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_flush_commit(struct msm_kms *kms, unsigned crtc_mask) crtc_mask 313 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask) { crtc_mask 345 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_complete_commit(struct msm_kms *kms, unsigned crtc_mask) crtc_mask 352 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask) crtc_mask 399 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_wait_flush(struct msm_kms *kms, unsigned crtc_mask) crtc_mask 404 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask) crtc_mask 122 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static void mdp4_flush_commit(struct msm_kms *kms, unsigned crtc_mask) crtc_mask 127 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static void mdp4_wait_flush(struct msm_kms *kms, unsigned crtc_mask) crtc_mask 132 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c for_each_crtc_mask(mdp4_kms->dev, crtc, crtc_mask) crtc_mask 136 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c static void mdp4_complete_commit(struct msm_kms *kms, unsigned crtc_mask) crtc_mask 142 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c for_each_crtc_mask(mdp4_kms->dev, crtc, crtc_mask) crtc_mask 172 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_flush_commit(struct msm_kms *kms, unsigned crtc_mask) crtc_mask 177 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_wait_flush(struct msm_kms *kms, unsigned crtc_mask) crtc_mask 182 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c for_each_crtc_mask(mdp5_kms->dev, crtc, crtc_mask) crtc_mask 186 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static void mdp5_complete_commit(struct msm_kms *kms, unsigned crtc_mask) crtc_mask 32 drivers/gpu/drm/msm/msm_atomic.c unsigned crtc_mask = BIT(crtc_idx); crtc_mask 34 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_async_commit_start(crtc_mask); crtc_mask 38 drivers/gpu/drm/msm/msm_atomic.c if (!(kms->pending_crtc_mask & crtc_mask)) { crtc_mask 43 drivers/gpu/drm/msm/msm_atomic.c kms->pending_crtc_mask &= ~crtc_mask; crtc_mask 50 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_flush_commit(crtc_mask); crtc_mask 51 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->flush_commit(kms, crtc_mask); crtc_mask 57 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_wait_flush_start(crtc_mask); crtc_mask 58 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->wait_flush(kms, crtc_mask); crtc_mask 59 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_wait_flush_finish(crtc_mask); crtc_mask 62 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->complete_commit(kms, crtc_mask); crtc_mask 67 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_async_commit_finish(crtc_mask); crtc_mask 148 drivers/gpu/drm/msm/msm_atomic.c unsigned crtc_mask = get_crtc_mask(state); crtc_mask 152 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_commit_tail_start(async, crtc_mask); crtc_mask 160 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_wait_flush_start(crtc_mask); crtc_mask 161 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->wait_flush(kms, crtc_mask); crtc_mask 162 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_wait_flush_finish(crtc_mask); crtc_mask 184 drivers/gpu/drm/msm/msm_atomic.c WARN_ON(crtc_mask != drm_crtc_mask(async_crtc)); crtc_mask 190 drivers/gpu/drm/msm/msm_atomic.c if (!(kms->pending_crtc_mask & crtc_mask)) { crtc_mask 193 drivers/gpu/drm/msm/msm_atomic.c kms->pending_crtc_mask |= crtc_mask; crtc_mask 213 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_commit_tail_finish(async, crtc_mask); crtc_mask 222 drivers/gpu/drm/msm/msm_atomic.c kms->pending_crtc_mask &= ~crtc_mask; crtc_mask 227 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_flush_commit(crtc_mask); crtc_mask 228 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->flush_commit(kms, crtc_mask); crtc_mask 234 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_wait_flush_start(crtc_mask); crtc_mask 235 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->wait_flush(kms, crtc_mask); crtc_mask 236 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_wait_flush_finish(crtc_mask); crtc_mask 239 drivers/gpu/drm/msm/msm_atomic.c kms->funcs->complete_commit(kms, crtc_mask); crtc_mask 246 drivers/gpu/drm/msm/msm_atomic.c trace_msm_atomic_commit_tail_finish(async, crtc_mask); crtc_mask 12 drivers/gpu/drm/msm/msm_atomic_trace.h TP_PROTO(bool async, unsigned crtc_mask), crtc_mask 13 drivers/gpu/drm/msm/msm_atomic_trace.h TP_ARGS(async, crtc_mask), crtc_mask 16 drivers/gpu/drm/msm/msm_atomic_trace.h __field(u32, crtc_mask) crtc_mask 20 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask = crtc_mask; crtc_mask 23 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->async, __entry->crtc_mask) crtc_mask 27 drivers/gpu/drm/msm/msm_atomic_trace.h TP_PROTO(bool async, unsigned crtc_mask), crtc_mask 28 drivers/gpu/drm/msm/msm_atomic_trace.h TP_ARGS(async, crtc_mask), crtc_mask 31 drivers/gpu/drm/msm/msm_atomic_trace.h __field(u32, crtc_mask) crtc_mask 35 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask = crtc_mask; crtc_mask 38 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->async, __entry->crtc_mask) crtc_mask 42 drivers/gpu/drm/msm/msm_atomic_trace.h TP_PROTO(unsigned crtc_mask), crtc_mask 43 drivers/gpu/drm/msm/msm_atomic_trace.h TP_ARGS(crtc_mask), crtc_mask 45 drivers/gpu/drm/msm/msm_atomic_trace.h __field(u32, crtc_mask) crtc_mask 48 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask = crtc_mask; crtc_mask 51 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask) crtc_mask 55 drivers/gpu/drm/msm/msm_atomic_trace.h TP_PROTO(unsigned crtc_mask), crtc_mask 56 drivers/gpu/drm/msm/msm_atomic_trace.h TP_ARGS(crtc_mask), crtc_mask 58 drivers/gpu/drm/msm/msm_atomic_trace.h __field(u32, crtc_mask) crtc_mask 61 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask = crtc_mask; crtc_mask 64 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask) crtc_mask 68 drivers/gpu/drm/msm/msm_atomic_trace.h TP_PROTO(unsigned crtc_mask), crtc_mask 69 drivers/gpu/drm/msm/msm_atomic_trace.h TP_ARGS(crtc_mask), crtc_mask 71 drivers/gpu/drm/msm/msm_atomic_trace.h __field(u32, crtc_mask) crtc_mask 74 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask = crtc_mask; crtc_mask 77 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask) crtc_mask 81 drivers/gpu/drm/msm/msm_atomic_trace.h TP_PROTO(unsigned crtc_mask), crtc_mask 82 drivers/gpu/drm/msm/msm_atomic_trace.h TP_ARGS(crtc_mask), crtc_mask 84 drivers/gpu/drm/msm/msm_atomic_trace.h __field(u32, crtc_mask) crtc_mask 87 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask = crtc_mask; crtc_mask 90 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask) crtc_mask 94 drivers/gpu/drm/msm/msm_atomic_trace.h TP_PROTO(unsigned crtc_mask), crtc_mask 95 drivers/gpu/drm/msm/msm_atomic_trace.h TP_ARGS(crtc_mask), crtc_mask 97 drivers/gpu/drm/msm/msm_atomic_trace.h __field(u32, crtc_mask) crtc_mask 100 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask = crtc_mask; crtc_mask 103 drivers/gpu/drm/msm/msm_atomic_trace.h __entry->crtc_mask) crtc_mask 81 drivers/gpu/drm/msm/msm_kms.h void (*flush_commit)(struct msm_kms *kms, unsigned crtc_mask); crtc_mask 90 drivers/gpu/drm/msm/msm_kms.h void (*wait_flush)(struct msm_kms *kms, unsigned crtc_mask); crtc_mask 97 drivers/gpu/drm/msm/msm_kms.h void (*complete_commit)(struct msm_kms *kms, unsigned crtc_mask); crtc_mask 193 drivers/gpu/drm/msm/msm_kms.h #define for_each_crtc_mask(dev, crtc, crtc_mask) \ crtc_mask 195 drivers/gpu/drm/msm/msm_kms.h for_each_if (drm_crtc_mask(crtc) & (crtc_mask)) crtc_mask 74 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c u32 crtc_mask = 0; crtc_mask 87 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c crtc_mask |= (1 << i); crtc_mask 96 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c if (!(crtc_mask & (1 << i))) crtc_mask 162 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c if (!(crtc_mask & (1 << i)))