crtc_hsync_start 180 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover; crtc_hsync_start 181 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width; crtc_hsync_start 208 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay + amdgpu_crtc->h_border); crtc_hsync_start 210 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start); crtc_hsync_start 3368 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mode_in->crtc_hsync_end - mode_in->crtc_hsync_start; crtc_hsync_start 3370 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mode_in->crtc_hsync_start - mode_in->crtc_hdisplay; crtc_hsync_start 3448 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dst_mode->crtc_hsync_start = src_mode->crtc_hsync_start; crtc_hsync_start 84 drivers/gpu/drm/arc/arcpgu_crtc.c ENCODE_PGU_XY(m->crtc_hsync_start - m->crtc_hdisplay, crtc_hsync_start 1040 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c hfront_porch = mode->crtc_hsync_start - mode->crtc_hdisplay; crtc_hsync_start 1041 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; crtc_hsync_start 410 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c adjusted_mode->crtc_hsync_start /= 2; crtc_hsync_start 138 drivers/gpu/drm/arm/hdlcd_crtc.c vm.hfront_porch = m->crtc_hsync_start - m->crtc_hdisplay; crtc_hsync_start 140 drivers/gpu/drm/arm/hdlcd_crtc.c vm.hsync_len = m->crtc_hsync_end - m->crtc_hsync_start; crtc_hsync_start 341 drivers/gpu/drm/armada/armada_crtc.c rm = adj->crtc_hsync_start - adj->crtc_hdisplay; crtc_hsync_start 362 drivers/gpu/drm/armada/armada_crtc.c val = adj->crtc_hsync_start; crtc_hsync_start 191 drivers/gpu/drm/ast/ast_mode.c adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder + crtc_hsync_start 314 drivers/gpu/drm/ast/ast_mode.c temp = ((mode->crtc_hsync_start-precache) >> 3) - 1; crtc_hsync_start 85 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay; crtc_hsync_start 87 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start; crtc_hsync_start 690 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c hsync_offset = adj_mode->crtc_hsync_start - crtc_hsync_start 695 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c adj_mode->crtc_hsync_start; crtc_hsync_start 490 drivers/gpu/drm/bridge/cdns-dsi.c return mode->crtc_hsync_start - mode->crtc_hdisplay; crtc_hsync_start 531 drivers/gpu/drm/bridge/cdns-dsi.c mode->crtc_hsync_end : mode->crtc_hsync_start); crtc_hsync_start 539 drivers/gpu/drm/bridge/cdns-dsi.c tmp = mode->crtc_hsync_end - mode->crtc_hsync_start; crtc_hsync_start 850 drivers/gpu/drm/drm_modes.c p->crtc_hsync_start = p->hsync_start; crtc_hsync_start 902 drivers/gpu/drm/drm_modes.c p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); crtc_hsync_start 203 drivers/gpu/drm/exynos/exynos5433_drm_decon.c m->crtc_hsync_start = m->crtc_hdisplay + 10; crtc_hsync_start 249 drivers/gpu/drm/exynos/exynos5433_drm_decon.c m->crtc_hsync_start - m->crtc_hdisplay - 1); crtc_hsync_start 253 drivers/gpu/drm/exynos/exynos5433_drm_decon.c m->crtc_hsync_end - m->crtc_hsync_start - 1); crtc_hsync_start 179 drivers/gpu/drm/exynos/exynos7_drm_decon.c hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; crtc_hsync_start 181 drivers/gpu/drm/exynos/exynos7_drm_decon.c hfpd = mode->crtc_hsync_start - mode->crtc_hdisplay; crtc_hsync_start 509 drivers/gpu/drm/exynos/exynos_drm_fimd.c hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; crtc_hsync_start 511 drivers/gpu/drm/exynos/exynos_drm_fimd.c hfpd = mode->crtc_hsync_start - mode->crtc_hdisplay; crtc_hsync_start 791 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | crtc_hsync_start 813 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - crtc_hsync_start 829 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | crtc_hsync_start 450 drivers/gpu/drm/gma500/oaktrail_crtc.c (adjusted_mode->crtc_hsync_start - offsetX - 1) | crtc_hsync_start 467 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE_WITH_AUX(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | crtc_hsync_start 330 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(hsync_reg, (adjusted_mode->crtc_hsync_start - 1) | ((adjusted_mode->crtc_hsync_end - 1) << 16)); crtc_hsync_start 338 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_HSYNC_B, (adjusted_mode->crtc_hsync_start - 1) | ((adjusted_mode->crtc_hsync_end - 1) << 16)); crtc_hsync_start 265 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | crtc_hsync_start 740 drivers/gpu/drm/gma500/psb_intel_sdvo.c h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; crtc_hsync_start 745 drivers/gpu/drm/gma500/psb_intel_sdvo.c h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; crtc_hsync_start 580 drivers/gpu/drm/i915/display/dvo_ns2501.c adjusted_mode->crtc_hsync_start, crtc_hsync_start 782 drivers/gpu/drm/i915/display/icl_dsi.c hsync_start = adjusted_mode->crtc_hsync_start; crtc_hsync_start 1233 drivers/gpu/drm/i915/display/icl_dsi.c adjusted_mode->crtc_hsync_start *= 2; crtc_hsync_start 7482 drivers/gpu/drm/i915/display/intel_display.c adjusted_mode->crtc_hsync_start == adjusted_mode->crtc_hdisplay) crtc_hsync_start 8143 drivers/gpu/drm/i915/display/intel_display.c vsyncshift = adjusted_mode->crtc_hsync_start - crtc_hsync_start 8159 drivers/gpu/drm/i915/display/intel_display.c (adjusted_mode->crtc_hsync_start - 1) | crtc_hsync_start 8216 drivers/gpu/drm/i915/display/intel_display.c pipe_config->base.adjusted_mode.crtc_hsync_start = (tmp & 0xffff) + 1; crtc_hsync_start 8261 drivers/gpu/drm/i915/display/intel_display.c mode->hsync_start = pipe_config->base.adjusted_mode.crtc_hsync_start; crtc_hsync_start 11956 drivers/gpu/drm/i915/display/intel_display.c mode->crtc_hdisplay, mode->crtc_hsync_start, crtc_hsync_start 12721 drivers/gpu/drm/i915/display/intel_display.c PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start); crtc_hsync_start 940 drivers/gpu/drm/i915/display/intel_hdmi.c mode->crtc_hsync_start % pixels_per_group == 0 && crtc_hsync_start 251 drivers/gpu/drm/i915/display/intel_panel.c sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; crtc_hsync_start 262 drivers/gpu/drm/i915/display/intel_panel.c adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; crtc_hsync_start 263 drivers/gpu/drm/i915/display/intel_panel.c adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; crtc_hsync_start 1107 drivers/gpu/drm/i915/display/vlv_dsi.c adjusted_mode->crtc_hsync_start = hfp + adjusted_mode->crtc_hdisplay; crtc_hsync_start 1108 drivers/gpu/drm/i915/display/vlv_dsi.c adjusted_mode->crtc_hsync_end = hsync + adjusted_mode->crtc_hsync_start; crtc_hsync_start 1129 drivers/gpu/drm/i915/display/vlv_dsi.c hfp_sw = adjusted_mode_sw->crtc_hsync_start - crtc_hsync_start 1132 drivers/gpu/drm/i915/display/vlv_dsi.c adjusted_mode_sw->crtc_hsync_start; crtc_hsync_start 1173 drivers/gpu/drm/i915/display/vlv_dsi.c if (adjusted_mode->crtc_hsync_start == crtc_hsync_start_sw) crtc_hsync_start 1174 drivers/gpu/drm/i915/display/vlv_dsi.c adjusted_mode->crtc_hsync_start = crtc_hsync_start 1175 drivers/gpu/drm/i915/display/vlv_dsi.c adjusted_mode_sw->crtc_hsync_start; crtc_hsync_start 1239 drivers/gpu/drm/i915/display/vlv_dsi.c hfp = adjusted_mode->crtc_hsync_start - adjusted_mode->crtc_hdisplay; crtc_hsync_start 1240 drivers/gpu/drm/i915/display/vlv_dsi.c hsync = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; crtc_hsync_start 785 drivers/gpu/drm/i915/i915_irq.c hsync_start = mode->crtc_hsync_start; crtc_hsync_start 967 drivers/gpu/drm/i915/i915_irq.c hsync_start = mode->crtc_hsync_start; crtc_hsync_start 1619 drivers/gpu/drm/mgag200/mgag200_mode.c if (mode->crtc_hdisplay > 2048 || mode->crtc_hsync_start > 4096 || crtc_hsync_start 266 drivers/gpu/drm/mxsfb/mxsfb_crtc.c hsync_pulse_len = m->crtc_hsync_end - m->crtc_hsync_start; crtc_hsync_start 271 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(SET_HOR_WAIT_CNT(m->crtc_htotal - m->crtc_hsync_start) | crtc_hsync_start 241 drivers/gpu/drm/nouveau/dispnv04/crtc.c int horizStart = (mode->crtc_hsync_start >> 3) + 1; crtc_hsync_start 260 drivers/gpu/drm/nouveau/dispnv50/head.c m->h.synce = mode->crtc_hsync_end - mode->crtc_hsync_start - 1; crtc_hsync_start 261 drivers/gpu/drm/nouveau/dispnv50/head.c m->h.blanke = mode->crtc_hblank_end - mode->crtc_hsync_start - 1; crtc_hsync_start 321 drivers/gpu/drm/radeon/atombios_crtc.c cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay + radeon_crtc->h_border); crtc_hsync_start 323 drivers/gpu/drm/radeon/atombios_crtc.c cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start); crtc_hsync_start 363 drivers/gpu/drm/radeon/atombios_crtc.c args.usH_SyncStart = cpu_to_le16(mode->crtc_hsync_start); crtc_hsync_start 365 drivers/gpu/drm/radeon/atombios_crtc.c cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start); crtc_hsync_start 1824 drivers/gpu/drm/radeon/radeon_atombios.c mode->crtc_hsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart); crtc_hsync_start 1865 drivers/gpu/drm/radeon/radeon_atombios.c mode->crtc_hsync_start = le16_to_cpu(dtd_timings->usHActive) + crtc_hsync_start 1867 drivers/gpu/drm/radeon/radeon_atombios.c mode->crtc_hsync_end = mode->crtc_hsync_start + crtc_hsync_start 360 drivers/gpu/drm/radeon/radeon_encoders.c adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover; crtc_hsync_start 361 drivers/gpu/drm/radeon/radeon_encoders.c adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width; crtc_hsync_start 87 drivers/gpu/drm/radeon/radeon_legacy_crtc.c hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8; crtc_hsync_start 90 drivers/gpu/drm/radeon/radeon_legacy_crtc.c hsync_start = mode->crtc_hsync_start - 8; crtc_hsync_start 170 drivers/gpu/drm/radeon/radeon_legacy_crtc.c hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8; crtc_hsync_start 174 drivers/gpu/drm/radeon/radeon_legacy_crtc.c fp_h_sync_strt_wid = ((((mode->crtc_hsync_start - mode->crtc_hblank_start) / 8) & 0x1fff) crtc_hsync_start 625 drivers/gpu/drm/radeon/radeon_legacy_crtc.c hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8; crtc_hsync_start 628 drivers/gpu/drm/radeon/radeon_legacy_crtc.c hsync_start = mode->crtc_hsync_start - 8; crtc_hsync_start 429 drivers/gpu/drm/sun4i/sun4i_tcon.c bp = mode->crtc_htotal - mode->crtc_hsync_start; crtc_hsync_start 508 drivers/gpu/drm/sun4i/sun4i_tcon.c bp = mode->crtc_htotal - mode->crtc_hsync_start; crtc_hsync_start 531 drivers/gpu/drm/sun4i/sun4i_tcon.c hsync = mode->crtc_hsync_end - mode->crtc_hsync_start; crtc_hsync_start 627 drivers/gpu/drm/sun4i/sun4i_tcon.c bp = mode->crtc_htotal - mode->crtc_hsync_start; crtc_hsync_start 661 drivers/gpu/drm/sun4i/sun4i_tcon.c hsync = mode->crtc_hsync_end - mode->crtc_hsync_start; crtc_hsync_start 168 drivers/gpu/drm/udl/udl_modeset.c xds = mode->crtc_htotal - mode->crtc_hsync_start; crtc_hsync_start 190 drivers/gpu/drm/udl/udl_modeset.c mode->crtc_hsync_end - mode->crtc_hsync_start + 1); crtc_hsync_start 362 include/drm/drm_modes.h int crtc_hsync_start;