DC_HW_STATE_MASK_OTPC_UNDERFLOW 529 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c const unsigned int DC_HW_STATE_MASK_OTPC_UNDERFLOW = 0x2; DC_HW_STATE_MASK_OTPC_UNDERFLOW 537 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c if (mask & DC_HW_STATE_MASK_OTPC_UNDERFLOW)