DC_HW_STATE_MASK_MPCC  554 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 	const unsigned int DC_HW_STATE_MASK_MPCC			= 0x40;
DC_HW_STATE_MASK_MPCC  601 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 	if ((mask & DC_HW_STATE_MASK_MPCC) && remaining_buf_size > 0) {