DC_HW_STATE_MASK_HUBP_UNDERFLOW 528 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c const unsigned int DC_HW_STATE_MASK_HUBP_UNDERFLOW = 0x1; DC_HW_STATE_MASK_HUBP_UNDERFLOW 534 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c if (mask & DC_HW_STATE_MASK_HUBP_UNDERFLOW)