DC_ABM1_IPCSC_COEFF_SEL  267 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 	REG_SET_3(DC_ABM1_IPCSC_COEFF_SEL, 0,
DC_ABM1_IPCSC_COEFF_SEL   48 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SR(DC_ABM1_IPCSC_COEFF_SEL), \
DC_ABM1_IPCSC_COEFF_SEL   62 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(DC_ABM1_IPCSC_COEFF_SEL, ABM, id), \
DC_ABM1_IPCSC_COEFF_SEL   77 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SR(DC_ABM1_IPCSC_COEFF_SEL), \
DC_ABM1_IPCSC_COEFF_SEL  112 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	ABM_SF(DC_ABM1_IPCSC_COEFF_SEL, \
DC_ABM1_IPCSC_COEFF_SEL  114 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	ABM_SF(DC_ABM1_IPCSC_COEFF_SEL, \
DC_ABM1_IPCSC_COEFF_SEL  116 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	ABM_SF(DC_ABM1_IPCSC_COEFF_SEL, \
DC_ABM1_IPCSC_COEFF_SEL  216 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	uint32_t DC_ABM1_IPCSC_COEFF_SEL;