cr11 121 arch/parisc/include/asm/asmregs.h sar: .reg %cr11 cr11 148 arch/parisc/include/asm/asmregs.h cr11: .reg %cr11 cr11 438 arch/parisc/include/asm/assembly.h mfctl,w %cr11, %r1 cr11 441 arch/parisc/include/asm/assembly.h SAVE_CR (%cr11, PT_SAR (\regs)) cr11 470 arch/parisc/include/asm/assembly.h REST_CR (%cr11, PT_SAR (\regs)) cr11 634 arch/s390/include/asm/kvm_host.h unsigned long cr11; cr11 116 arch/s390/include/asm/ptrace.h unsigned long cr11; /* PER ending address */ cr11 11 arch/s390/kernel/compat_ptrace.h __u32 cr11; /* PER ending address */ cr11 164 arch/s390/kernel/ptrace.c else if (addr == (addr_t) &dummy->cr11) cr11 549 arch/s390/kernel/ptrace.c else if (addr == (addr_t) &dummy32->cr11) cr11 64 arch/s390/kvm/guestdbg.c u64 *cr11 = &vcpu->arch.sie_block->gcr[11]; cr11 95 arch/s390/kvm/guestdbg.c extend_address_range(cr10, cr11, start, len); cr11 104 arch/s390/kvm/guestdbg.c u64 *cr11 = &vcpu->arch.sie_block->gcr[11]; cr11 116 arch/s390/kvm/guestdbg.c *cr11 = -1UL; cr11 125 arch/s390/kvm/guestdbg.c extend_address_range(cr10, cr11, start, len); cr11 135 arch/s390/kvm/guestdbg.c vcpu->arch.guestdbg.cr11 = vcpu->arch.sie_block->gcr[11]; cr11 143 arch/s390/kvm/guestdbg.c vcpu->arch.sie_block->gcr[11] = vcpu->arch.guestdbg.cr11; cr11 500 arch/s390/kvm/guestdbg.c const u64 cr11 = vcpu->arch.sie_block->gcr[11]; cr11 532 arch/s390/kvm/guestdbg.c if (in_addr_range(fetched_addr, cr10, cr11)) cr11 543 arch/s390/kvm/guestdbg.c u64 cr11 = vcpu->arch.sie_block->gcr[11]; cr11 555 arch/s390/kvm/guestdbg.c !in_addr_range(addr, cr10, cr11)) cr11 567 arch/s390/kvm/guestdbg.c if (rc || !in_addr_range(fetched_addr, cr10, cr11)) cr11 33 arch/sh/include/cpu-sh5/cpu/registers.h #define VBR cr11 cr11 274 drivers/gpu/drm/nouveau/dispnv04/hw.h uint8_t cr11 = NVReadVgaCrtc(dev, head, NV_CIO_CR_VRE_INDEX); cr11 275 drivers/gpu/drm/nouveau/dispnv04/hw.h bool waslocked = cr11 & 0x80; cr11 278 drivers/gpu/drm/nouveau/dispnv04/hw.h cr11 |= 0x80; cr11 280 drivers/gpu/drm/nouveau/dispnv04/hw.h cr11 &= ~0x80; cr11 281 drivers/gpu/drm/nouveau/dispnv04/hw.h NVWriteVgaCrtc(dev, head, NV_CIO_CR_VRE_INDEX, cr11); cr11 215 drivers/video/fbdev/i810/i810.h u8 cr09, cr10, cr11, cr12; cr11 238 drivers/video/fbdev/i810/i810.h u8 cr10, cr11, cr12, cr13, cr14; cr11 274 drivers/video/fbdev/i810/i810_dvt.c var->vsync_len = (std_modes[mode].cr11 & 0x0F) - cr11 168 drivers/video/fbdev/i810/i810_gtf.c par->regs.cr11 = i810_readb(CR11, mmio) & ~0x0F; cr11 169 drivers/video/fbdev/i810/i810_gtf.c par->regs.cr11 |= (u8) ((yres + var->lower_margin + cr11 283 drivers/video/fbdev/i810/i810_main.c i810_writeb(CR_DATA_CGA, mmio, par->regs.cr11); cr11 59 drivers/video/fbdev/nvidia/nv_hw.c u8 cr11; cr11 65 drivers/video/fbdev/nvidia/nv_hw.c cr11 = VGA_RD08(par->PCIO, 0x3D5); cr11 67 drivers/video/fbdev/nvidia/nv_hw.c cr11 |= 0x80; cr11 69 drivers/video/fbdev/nvidia/nv_hw.c cr11 &= ~0x80; cr11 70 drivers/video/fbdev/nvidia/nv_hw.c VGA_WR08(par->PCIO, 0x3D5, cr11); cr11 91 drivers/video/fbdev/riva/riva_hw.c U008 cr11; cr11 93 drivers/video/fbdev/riva/riva_hw.c cr11 = VGA_RD08(chip->PCIO, 0x3D5); cr11 94 drivers/video/fbdev/riva/riva_hw.c if(Lock) cr11 |= 0x80; cr11 95 drivers/video/fbdev/riva/riva_hw.c else cr11 &= ~0x80; cr11 96 drivers/video/fbdev/riva/riva_hw.c VGA_WR08(chip->PCIO, 0x3D5, cr11);