cqspi              48 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st	*cqspi;
cqspi             254 drivers/mtd/spi-nor/cadence-quadspi.c static bool cqspi_is_idle(struct cqspi_st *cqspi)
cqspi             256 drivers/mtd/spi-nor/cadence-quadspi.c 	u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
cqspi             261 drivers/mtd/spi-nor/cadence-quadspi.c static u32 cqspi_get_rd_sram_level(struct cqspi_st *cqspi)
cqspi             263 drivers/mtd/spi-nor/cadence-quadspi.c 	u32 reg = readl(cqspi->iobase + CQSPI_REG_SDRAMLEVEL);
cqspi             271 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = dev;
cqspi             275 drivers/mtd/spi-nor/cadence-quadspi.c 	irq_status = readl(cqspi->iobase + CQSPI_REG_IRQSTATUS);
cqspi             278 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(irq_status, cqspi->iobase + CQSPI_REG_IRQSTATUS);
cqspi             283 drivers/mtd/spi-nor/cadence-quadspi.c 		complete(&cqspi->transfer_complete);
cqspi             300 drivers/mtd/spi-nor/cadence-quadspi.c static int cqspi_wait_idle(struct cqspi_st *cqspi)
cqspi             313 drivers/mtd/spi-nor/cadence-quadspi.c 		if (cqspi_is_idle(cqspi))
cqspi             323 drivers/mtd/spi-nor/cadence-quadspi.c 			dev_err(&cqspi->pdev->dev,
cqspi             333 drivers/mtd/spi-nor/cadence-quadspi.c static int cqspi_exec_flash_cmd(struct cqspi_st *cqspi, unsigned int reg)
cqspi             335 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             348 drivers/mtd/spi-nor/cadence-quadspi.c 		dev_err(&cqspi->pdev->dev,
cqspi             354 drivers/mtd/spi-nor/cadence-quadspi.c 	return cqspi_wait_idle(cqspi);
cqspi             362 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             363 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             385 drivers/mtd/spi-nor/cadence-quadspi.c 	status = cqspi_exec_flash_cmd(cqspi, reg);
cqspi             410 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             411 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             442 drivers/mtd/spi-nor/cadence-quadspi.c 	ret = cqspi_exec_flash_cmd(cqspi, reg);
cqspi             450 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             451 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             461 drivers/mtd/spi-nor/cadence-quadspi.c 	return cqspi_exec_flash_cmd(cqspi, reg);
cqspi             467 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             468 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             508 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             509 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             510 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *ahb_base = cqspi->ahb_base;
cqspi             525 drivers/mtd/spi-nor/cadence-quadspi.c 	reinit_completion(&cqspi->transfer_complete);
cqspi             530 drivers/mtd/spi-nor/cadence-quadspi.c 		if (!wait_for_completion_timeout(&cqspi->transfer_complete,
cqspi             534 drivers/mtd/spi-nor/cadence-quadspi.c 		bytes_to_read = cqspi_get_rd_sram_level(cqspi);
cqspi             544 drivers/mtd/spi-nor/cadence-quadspi.c 			bytes_to_read *= cqspi->fifo_width;
cqspi             562 drivers/mtd/spi-nor/cadence-quadspi.c 			bytes_to_read = cqspi_get_rd_sram_level(cqspi);
cqspi             566 drivers/mtd/spi-nor/cadence-quadspi.c 			reinit_completion(&cqspi->transfer_complete);
cqspi             600 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             601 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             621 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             622 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             635 drivers/mtd/spi-nor/cadence-quadspi.c 	reinit_completion(&cqspi->transfer_complete);
cqspi             645 drivers/mtd/spi-nor/cadence-quadspi.c 	if (cqspi->wr_delay)
cqspi             646 drivers/mtd/spi-nor/cadence-quadspi.c 		ndelay(cqspi->wr_delay);
cqspi             656 drivers/mtd/spi-nor/cadence-quadspi.c 			iowrite32_rep(cqspi->ahb_base, txbuf, write_words);
cqspi             663 drivers/mtd/spi-nor/cadence-quadspi.c 			iowrite32(temp, cqspi->ahb_base);
cqspi             667 drivers/mtd/spi-nor/cadence-quadspi.c 		if (!wait_for_completion_timeout(&cqspi->transfer_complete,
cqspi             677 drivers/mtd/spi-nor/cadence-quadspi.c 			reinit_completion(&cqspi->transfer_complete);
cqspi             695 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi_wait_idle(cqspi);
cqspi             712 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             713 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             718 drivers/mtd/spi-nor/cadence-quadspi.c 	if (cqspi->is_decoded_cs) {
cqspi             742 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             743 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *iobase = cqspi->iobase;
cqspi             760 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->current_page_size = nor->page_size;
cqspi             761 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->current_erase_size = nor->mtd.erasesize;
cqspi             762 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->current_addr_width = nor->addr_width;
cqspi             779 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             780 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *iobase = cqspi->iobase;
cqspi             781 drivers/mtd/spi-nor/cadence-quadspi.c 	const unsigned int ref_clk_hz = cqspi->master_ref_clk_hz;
cqspi             787 drivers/mtd/spi-nor/cadence-quadspi.c 	tsclk = DIV_ROUND_UP(ref_clk_hz, cqspi->sclk);
cqspi             809 drivers/mtd/spi-nor/cadence-quadspi.c static void cqspi_config_baudrate_div(struct cqspi_st *cqspi)
cqspi             811 drivers/mtd/spi-nor/cadence-quadspi.c 	const unsigned int ref_clk_hz = cqspi->master_ref_clk_hz;
cqspi             812 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             816 drivers/mtd/spi-nor/cadence-quadspi.c 	div = DIV_ROUND_UP(ref_clk_hz, 2 * cqspi->sclk) - 1;
cqspi             824 drivers/mtd/spi-nor/cadence-quadspi.c static void cqspi_readdata_capture(struct cqspi_st *cqspi,
cqspi             828 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             847 drivers/mtd/spi-nor/cadence-quadspi.c static void cqspi_controller_enable(struct cqspi_st *cqspi, bool enable)
cqspi             849 drivers/mtd/spi-nor/cadence-quadspi.c 	void __iomem *reg_base = cqspi->iobase;
cqspi             865 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             867 drivers/mtd/spi-nor/cadence-quadspi.c 	int switch_cs = (cqspi->current_cs != f_pdata->cs);
cqspi             868 drivers/mtd/spi-nor/cadence-quadspi.c 	int switch_ck = (cqspi->sclk != sclk);
cqspi             870 drivers/mtd/spi-nor/cadence-quadspi.c 	if ((cqspi->current_page_size != nor->page_size) ||
cqspi             871 drivers/mtd/spi-nor/cadence-quadspi.c 	    (cqspi->current_erase_size != nor->mtd.erasesize) ||
cqspi             872 drivers/mtd/spi-nor/cadence-quadspi.c 	    (cqspi->current_addr_width != nor->addr_width))
cqspi             876 drivers/mtd/spi-nor/cadence-quadspi.c 		cqspi_controller_enable(cqspi, 0);
cqspi             880 drivers/mtd/spi-nor/cadence-quadspi.c 		cqspi->current_cs = f_pdata->cs;
cqspi             886 drivers/mtd/spi-nor/cadence-quadspi.c 		cqspi->sclk = sclk;
cqspi             887 drivers/mtd/spi-nor/cadence-quadspi.c 		cqspi_config_baudrate_div(cqspi);
cqspi             889 drivers/mtd/spi-nor/cadence-quadspi.c 		cqspi_readdata_capture(cqspi, !cqspi->rclk_en,
cqspi             894 drivers/mtd/spi-nor/cadence-quadspi.c 		cqspi_controller_enable(cqspi, 1);
cqspi             933 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             945 drivers/mtd/spi-nor/cadence-quadspi.c 		memcpy_toio(cqspi->ahb_base + to, buf, len);
cqspi             946 drivers/mtd/spi-nor/cadence-quadspi.c 		ret = cqspi_wait_idle(cqspi);
cqspi             958 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = param;
cqspi             960 drivers/mtd/spi-nor/cadence-quadspi.c 	complete(&cqspi->rx_dma_complete);
cqspi             967 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi             969 drivers/mtd/spi-nor/cadence-quadspi.c 	dma_addr_t dma_src = (dma_addr_t)cqspi->mmap_phys_base + from;
cqspi             975 drivers/mtd/spi-nor/cadence-quadspi.c 	if (!cqspi->rx_chan || !virt_addr_valid(buf)) {
cqspi             976 drivers/mtd/spi-nor/cadence-quadspi.c 		memcpy_fromio(buf, cqspi->ahb_base + from, len);
cqspi             985 drivers/mtd/spi-nor/cadence-quadspi.c 	tx = dmaengine_prep_dma_memcpy(cqspi->rx_chan, dma_dst, dma_src,
cqspi             994 drivers/mtd/spi-nor/cadence-quadspi.c 	tx->callback_param = cqspi;
cqspi             996 drivers/mtd/spi-nor/cadence-quadspi.c 	reinit_completion(&cqspi->rx_dma_complete);
cqspi            1005 drivers/mtd/spi-nor/cadence-quadspi.c 	dma_async_issue_pending(cqspi->rx_chan);
cqspi            1006 drivers/mtd/spi-nor/cadence-quadspi.c 	if (!wait_for_completion_timeout(&cqspi->rx_dma_complete,
cqspi            1008 drivers/mtd/spi-nor/cadence-quadspi.c 		dmaengine_terminate_sync(cqspi->rx_chan);
cqspi            1068 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi            1070 drivers/mtd/spi-nor/cadence-quadspi.c 	mutex_lock(&cqspi->bus_mutex);
cqspi            1078 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = f_pdata->cqspi;
cqspi            1080 drivers/mtd/spi-nor/cadence-quadspi.c 	mutex_unlock(&cqspi->bus_mutex);
cqspi            1145 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = platform_get_drvdata(pdev);
cqspi            1147 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->is_decoded_cs = of_property_read_bool(np, "cdns,is-decoded-cs");
cqspi            1149 drivers/mtd/spi-nor/cadence-quadspi.c 	if (of_property_read_u32(np, "cdns,fifo-depth", &cqspi->fifo_depth)) {
cqspi            1154 drivers/mtd/spi-nor/cadence-quadspi.c 	if (of_property_read_u32(np, "cdns,fifo-width", &cqspi->fifo_width)) {
cqspi            1160 drivers/mtd/spi-nor/cadence-quadspi.c 				 &cqspi->trigger_address)) {
cqspi            1165 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->rclk_en = of_property_read_bool(np, "cdns,rclk-en");
cqspi            1170 drivers/mtd/spi-nor/cadence-quadspi.c static void cqspi_controller_init(struct cqspi_st *cqspi)
cqspi            1174 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi_controller_enable(cqspi, 0);
cqspi            1177 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(0, cqspi->iobase + CQSPI_REG_REMAP);
cqspi            1180 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(0, cqspi->iobase + CQSPI_REG_IRQMASK);
cqspi            1183 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(cqspi->fifo_depth / 2, cqspi->iobase + CQSPI_REG_SRAMPARTITION);
cqspi            1186 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(cqspi->trigger_address,
cqspi            1187 drivers/mtd/spi-nor/cadence-quadspi.c 	       cqspi->iobase + CQSPI_REG_INDIRECTTRIGGER);
cqspi            1190 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(cqspi->fifo_depth * cqspi->fifo_width / 2,
cqspi            1191 drivers/mtd/spi-nor/cadence-quadspi.c 	       cqspi->iobase + CQSPI_REG_INDIRECTRDWATERMARK);
cqspi            1193 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(cqspi->fifo_depth * cqspi->fifo_width / 8,
cqspi            1194 drivers/mtd/spi-nor/cadence-quadspi.c 	       cqspi->iobase + CQSPI_REG_INDIRECTWRWATERMARK);
cqspi            1197 drivers/mtd/spi-nor/cadence-quadspi.c 	reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
cqspi            1199 drivers/mtd/spi-nor/cadence-quadspi.c 	writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
cqspi            1201 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi_controller_enable(cqspi, 1);
cqspi            1204 drivers/mtd/spi-nor/cadence-quadspi.c static void cqspi_request_mmap_dma(struct cqspi_st *cqspi)
cqspi            1211 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->rx_chan = dma_request_chan_by_mask(&mask);
cqspi            1212 drivers/mtd/spi-nor/cadence-quadspi.c 	if (IS_ERR(cqspi->rx_chan)) {
cqspi            1213 drivers/mtd/spi-nor/cadence-quadspi.c 		dev_err(&cqspi->pdev->dev, "No Rx DMA available\n");
cqspi            1214 drivers/mtd/spi-nor/cadence-quadspi.c 		cqspi->rx_chan = NULL;
cqspi            1216 drivers/mtd/spi-nor/cadence-quadspi.c 	init_completion(&cqspi->rx_dma_complete);
cqspi            1219 drivers/mtd/spi-nor/cadence-quadspi.c static int cqspi_setup_flash(struct cqspi_st *cqspi, struct device_node *np)
cqspi            1221 drivers/mtd/spi-nor/cadence-quadspi.c 	struct platform_device *pdev = cqspi->pdev;
cqspi            1252 drivers/mtd/spi-nor/cadence-quadspi.c 		f_pdata = &cqspi->f_pdata[cs];
cqspi            1253 drivers/mtd/spi-nor/cadence-quadspi.c 		f_pdata->cqspi = cqspi;
cqspi            1294 drivers/mtd/spi-nor/cadence-quadspi.c 		if (mtd->size <= cqspi->ahb_size) {
cqspi            1299 drivers/mtd/spi-nor/cadence-quadspi.c 			if (!cqspi->rx_chan)
cqspi            1300 drivers/mtd/spi-nor/cadence-quadspi.c 				cqspi_request_mmap_dma(cqspi);
cqspi            1308 drivers/mtd/spi-nor/cadence-quadspi.c 		if (cqspi->f_pdata[i].registered)
cqspi            1309 drivers/mtd/spi-nor/cadence-quadspi.c 			mtd_device_unregister(&cqspi->f_pdata[i].nor.mtd);
cqspi            1317 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi;
cqspi            1325 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi = devm_kzalloc(dev, sizeof(*cqspi), GFP_KERNEL);
cqspi            1326 drivers/mtd/spi-nor/cadence-quadspi.c 	if (!cqspi)
cqspi            1329 drivers/mtd/spi-nor/cadence-quadspi.c 	mutex_init(&cqspi->bus_mutex);
cqspi            1330 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->pdev = pdev;
cqspi            1331 drivers/mtd/spi-nor/cadence-quadspi.c 	platform_set_drvdata(pdev, cqspi);
cqspi            1341 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->clk = devm_clk_get(dev, NULL);
cqspi            1342 drivers/mtd/spi-nor/cadence-quadspi.c 	if (IS_ERR(cqspi->clk)) {
cqspi            1344 drivers/mtd/spi-nor/cadence-quadspi.c 		return PTR_ERR(cqspi->clk);
cqspi            1349 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->iobase = devm_ioremap_resource(dev, res);
cqspi            1350 drivers/mtd/spi-nor/cadence-quadspi.c 	if (IS_ERR(cqspi->iobase)) {
cqspi            1352 drivers/mtd/spi-nor/cadence-quadspi.c 		return PTR_ERR(cqspi->iobase);
cqspi            1357 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->ahb_base = devm_ioremap_resource(dev, res_ahb);
cqspi            1358 drivers/mtd/spi-nor/cadence-quadspi.c 	if (IS_ERR(cqspi->ahb_base)) {
cqspi            1360 drivers/mtd/spi-nor/cadence-quadspi.c 		return PTR_ERR(cqspi->ahb_base);
cqspi            1362 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->mmap_phys_base = (dma_addr_t)res_ahb->start;
cqspi            1363 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->ahb_size = resource_size(res_ahb);
cqspi            1365 drivers/mtd/spi-nor/cadence-quadspi.c 	init_completion(&cqspi->transfer_complete);
cqspi            1381 drivers/mtd/spi-nor/cadence-quadspi.c 	ret = clk_prepare_enable(cqspi->clk);
cqspi            1406 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->master_ref_clk_hz = clk_get_rate(cqspi->clk);
cqspi            1409 drivers/mtd/spi-nor/cadence-quadspi.c 		cqspi->wr_delay = 5 * DIV_ROUND_UP(NSEC_PER_SEC,
cqspi            1410 drivers/mtd/spi-nor/cadence-quadspi.c 						   cqspi->master_ref_clk_hz);
cqspi            1413 drivers/mtd/spi-nor/cadence-quadspi.c 			       pdev->name, cqspi);
cqspi            1419 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi_wait_idle(cqspi);
cqspi            1420 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi_controller_init(cqspi);
cqspi            1421 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->current_cs = -1;
cqspi            1422 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi->sclk = 0;
cqspi            1424 drivers/mtd/spi-nor/cadence-quadspi.c 	ret = cqspi_setup_flash(cqspi, np);
cqspi            1432 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi_controller_enable(cqspi, 0);
cqspi            1434 drivers/mtd/spi-nor/cadence-quadspi.c 	clk_disable_unprepare(cqspi->clk);
cqspi            1443 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = platform_get_drvdata(pdev);
cqspi            1447 drivers/mtd/spi-nor/cadence-quadspi.c 		if (cqspi->f_pdata[i].registered)
cqspi            1448 drivers/mtd/spi-nor/cadence-quadspi.c 			mtd_device_unregister(&cqspi->f_pdata[i].nor.mtd);
cqspi            1450 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi_controller_enable(cqspi, 0);
cqspi            1452 drivers/mtd/spi-nor/cadence-quadspi.c 	if (cqspi->rx_chan)
cqspi            1453 drivers/mtd/spi-nor/cadence-quadspi.c 		dma_release_channel(cqspi->rx_chan);
cqspi            1455 drivers/mtd/spi-nor/cadence-quadspi.c 	clk_disable_unprepare(cqspi->clk);
cqspi            1466 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = dev_get_drvdata(dev);
cqspi            1468 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi_controller_enable(cqspi, 0);
cqspi            1474 drivers/mtd/spi-nor/cadence-quadspi.c 	struct cqspi_st *cqspi = dev_get_drvdata(dev);
cqspi            1476 drivers/mtd/spi-nor/cadence-quadspi.c 	cqspi_controller_enable(cqspi, 1);