DCN_VM_MX_L1_TLB_CNTL  807 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	REG_SET_2(DCN_VM_MX_L1_TLB_CNTL, 0,
DCN_VM_MX_L1_TLB_CNTL  107 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	SRI(DCN_VM_MX_L1_TLB_CNTL, HUBPREQ, id)
DCN_VM_MX_L1_TLB_CNTL  218 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	uint32_t DCN_VM_MX_L1_TLB_CNTL; \
DCN_VM_MX_L1_TLB_CNTL   72 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 	REG_SET_2(DCN_VM_MX_L1_TLB_CNTL, 0,
DCN_VM_MX_L1_TLB_CNTL  187 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c 	REG_SET_2(DCN_VM_MX_L1_TLB_CNTL, 0,