DCN_SURF1_TTU_CNTL1  710 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	REG_SET(DCN_SURF1_TTU_CNTL1, 0,
DCN_SURF1_TTU_CNTL1  976 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	REG_GET(DCN_SURF1_TTU_CNTL1,
DCN_SURF1_TTU_CNTL1   96 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	SRI(DCN_SURF1_TTU_CNTL1, HUBPREQ, id),\
DCN_SURF1_TTU_CNTL1  207 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	uint32_t DCN_SURF1_TTU_CNTL1; \
DCN_SURF1_TTU_CNTL1  278 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 	REG_SET(DCN_SURF1_TTU_CNTL1, 0,
DCN_SURF1_TTU_CNTL1 1174 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 	REG_GET(DCN_SURF1_TTU_CNTL1,