DCN_CUR1_TTU_CNTL1  283 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 	REG_SET(DCN_CUR1_TTU_CNTL1, 0,
DCN_CUR1_TTU_CNTL1   60 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h 	SRI(DCN_CUR1_TTU_CNTL1, HUBPREQ, id),\
DCN_CUR1_TTU_CNTL1  147 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h 	uint32_t DCN_CUR1_TTU_CNTL1;\