DCHUBBUB_GLOBAL_TIMER_CNTL 152 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \ DCHUBBUB_GLOBAL_TIMER_CNTL 357 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h uint32_t DCHUBBUB_GLOBAL_TIMER_CNTL; DCHUBBUB_GLOBAL_TIMER_CNTL 525 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \ DCHUBBUB_GLOBAL_TIMER_CNTL 583 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \ DCHUBBUB_GLOBAL_TIMER_CNTL 645 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \ DCHUBBUB_GLOBAL_TIMER_CNTL 48 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \ DCHUBBUB_GLOBAL_TIMER_CNTL 104 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h uint32_t DCHUBBUB_GLOBAL_TIMER_CNTL; DCHUBBUB_GLOBAL_TIMER_CNTL 151 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \ DCHUBBUB_GLOBAL_TIMER_CNTL 1194 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); DCHUBBUB_GLOBAL_TIMER_CNTL 538 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c REG_GET_2(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, &ref_div, DCHUBBUB_GLOBAL_TIMER_CNTL 66 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \ DCHUBBUB_GLOBAL_TIMER_CNTL 153 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2); DCHUBBUB_GLOBAL_TIMER_CNTL 154 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); DCHUBBUB_GLOBAL_TIMER_CNTL 2016 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2); DCHUBBUB_GLOBAL_TIMER_CNTL 2017 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); DCHUBBUB_GLOBAL_TIMER_CNTL 108 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \