cpu_cfg 86 arch/arc/plat-eznps/smp.c struct nps_host_reg_mtm_cpu_cfg cpu_cfg; cpu_cfg 92 arch/arc/plat-eznps/smp.c cpu_cfg.value = (u32)res_service; cpu_cfg 93 arch/arc/plat-eznps/smp.c cpu_cfg.dmsid = NPS_DEFAULT_MSID; cpu_cfg 94 arch/arc/plat-eznps/smp.c cpu_cfg.cs = 1; cpu_cfg 95 arch/arc/plat-eznps/smp.c iowrite32be(cpu_cfg.value, nps_mtm_reg_addr(cpu, NPS_MTM_CPU_CFG)); cpu_cfg 829 arch/x86/events/amd/ibs.c struct pci_dev *cpu_cfg; cpu_cfg 834 arch/x86/events/amd/ibs.c cpu_cfg = NULL; cpu_cfg 836 arch/x86/events/amd/ibs.c cpu_cfg = pci_get_device(PCI_VENDOR_ID_AMD, cpu_cfg 838 arch/x86/events/amd/ibs.c cpu_cfg); cpu_cfg 839 arch/x86/events/amd/ibs.c if (!cpu_cfg) cpu_cfg 842 arch/x86/events/amd/ibs.c pci_write_config_dword(cpu_cfg, IBSCTL, ibs_eilvt_off cpu_cfg 844 arch/x86/events/amd/ibs.c pci_read_config_dword(cpu_cfg, IBSCTL, &value); cpu_cfg 846 arch/x86/events/amd/ibs.c pci_dev_put(cpu_cfg);