cptvf 118 drivers/crypto/cavium/cpt/cptvf.h int cptvf_send_vf_up(struct cpt_vf *cptvf); cptvf 119 drivers/crypto/cavium/cpt/cptvf.h int cptvf_send_vf_down(struct cpt_vf *cptvf); cptvf 120 drivers/crypto/cavium/cpt/cptvf.h int cptvf_send_vf_to_grp_msg(struct cpt_vf *cptvf); cptvf 121 drivers/crypto/cavium/cpt/cptvf.h int cptvf_send_vf_priority_msg(struct cpt_vf *cptvf); cptvf 122 drivers/crypto/cavium/cpt/cptvf.h int cptvf_send_vq_size_msg(struct cpt_vf *cptvf); cptvf 123 drivers/crypto/cavium/cpt/cptvf.h int cptvf_check_pf_ready(struct cpt_vf *cptvf); cptvf 124 drivers/crypto/cavium/cpt/cptvf.h void cptvf_handle_mbox_intr(struct cpt_vf *cptvf); cptvf 126 drivers/crypto/cavium/cpt/cptvf.h int cvm_crypto_init(struct cpt_vf *cptvf); cptvf 127 drivers/crypto/cavium/cpt/cptvf.h void vq_post_process(struct cpt_vf *cptvf, u32 qno); cptvf 128 drivers/crypto/cavium/cpt/cptvf.h void cptvf_write_vq_doorbell(struct cpt_vf *cptvf, u32 val); cptvf 486 drivers/crypto/cavium/cpt/cptvf_algs.c int cvm_crypto_init(struct cpt_vf *cptvf) cptvf 488 drivers/crypto/cavium/cpt/cptvf_algs.c struct pci_dev *pdev = cptvf->pdev; cptvf 492 drivers/crypto/cavium/cpt/cptvf_algs.c dev_handle.cdev[dev_count] = cptvf; cptvf 116 drivers/crypto/cavium/cpt/cptvf_algs.h int cptvf_do_request(void *cptvf, struct cpt_request_info *req); cptvf 16 drivers/crypto/cavium/cpt/cptvf_main.c void *cptvf; cptvf 29 drivers/crypto/cavium/cpt/cptvf_main.c vq_post_process(cwqe->cptvf, cwqe->qno); cptvf 32 drivers/crypto/cavium/cpt/cptvf_main.c static int init_worker_threads(struct cpt_vf *cptvf) cptvf 34 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 42 drivers/crypto/cavium/cpt/cptvf_main.c if (cptvf->nr_queues) { cptvf 44 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->nr_queues); cptvf 47 drivers/crypto/cavium/cpt/cptvf_main.c for (i = 0; i < cptvf->nr_queues; i++) { cptvf 51 drivers/crypto/cavium/cpt/cptvf_main.c cwqe_info->vq_wqe[i].cptvf = cptvf; cptvf 54 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->wqe_info = cwqe_info; cptvf 59 drivers/crypto/cavium/cpt/cptvf_main.c static void cleanup_worker_threads(struct cpt_vf *cptvf) cptvf 62 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 65 drivers/crypto/cavium/cpt/cptvf_main.c cwqe_info = (struct cptvf_wqe_info *)cptvf->wqe_info; cptvf 69 drivers/crypto/cavium/cpt/cptvf_main.c if (cptvf->nr_queues) { cptvf 71 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->nr_queues); cptvf 74 drivers/crypto/cavium/cpt/cptvf_main.c for (i = 0; i < cptvf->nr_queues; i++) cptvf 78 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->wqe_info = NULL; cptvf 139 drivers/crypto/cavium/cpt/cptvf_main.c static int init_pending_queues(struct cpt_vf *cptvf, u32 qlen, u32 nr_queues) cptvf 141 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 147 drivers/crypto/cavium/cpt/cptvf_main.c ret = alloc_pending_queues(&cptvf->pqinfo, qlen, nr_queues); cptvf 157 drivers/crypto/cavium/cpt/cptvf_main.c static void cleanup_pending_queues(struct cpt_vf *cptvf) cptvf 159 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 161 drivers/crypto/cavium/cpt/cptvf_main.c if (!cptvf->nr_queues) cptvf 165 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->nr_queues); cptvf 166 drivers/crypto/cavium/cpt/cptvf_main.c free_pending_queues(&cptvf->pqinfo); cptvf 169 drivers/crypto/cavium/cpt/cptvf_main.c static void free_command_queues(struct cpt_vf *cptvf, cptvf 175 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 179 drivers/crypto/cavium/cpt/cptvf_main.c for (i = 0; i < cptvf->nr_queues; i++) { cptvf 203 drivers/crypto/cavium/cpt/cptvf_main.c static int alloc_command_queues(struct cpt_vf *cptvf, cptvf 210 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 215 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->qsize = min(qlen, cqinfo->qchunksize) * cptvf 221 drivers/crypto/cavium/cpt/cptvf_main.c for (i = 0; i < cptvf->nr_queues; i++) { cptvf 275 drivers/crypto/cavium/cpt/cptvf_main.c free_command_queues(cptvf, cqinfo); cptvf 279 drivers/crypto/cavium/cpt/cptvf_main.c static int init_command_queues(struct cpt_vf *cptvf, u32 qlen) cptvf 281 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 285 drivers/crypto/cavium/cpt/cptvf_main.c ret = alloc_command_queues(cptvf, &cptvf->cqinfo, CPT_INST_SIZE, cptvf 289 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->nr_queues); cptvf 296 drivers/crypto/cavium/cpt/cptvf_main.c static void cleanup_command_queues(struct cpt_vf *cptvf) cptvf 298 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 300 drivers/crypto/cavium/cpt/cptvf_main.c if (!cptvf->nr_queues) cptvf 304 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->nr_queues); cptvf 305 drivers/crypto/cavium/cpt/cptvf_main.c free_command_queues(cptvf, &cptvf->cqinfo); cptvf 308 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_sw_cleanup(struct cpt_vf *cptvf) cptvf 310 drivers/crypto/cavium/cpt/cptvf_main.c cleanup_worker_threads(cptvf); cptvf 311 drivers/crypto/cavium/cpt/cptvf_main.c cleanup_pending_queues(cptvf); cptvf 312 drivers/crypto/cavium/cpt/cptvf_main.c cleanup_command_queues(cptvf); cptvf 315 drivers/crypto/cavium/cpt/cptvf_main.c static int cptvf_sw_init(struct cpt_vf *cptvf, u32 qlen, u32 nr_queues) cptvf 317 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 324 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->nr_queues = nr_queues; cptvf 326 drivers/crypto/cavium/cpt/cptvf_main.c ret = init_command_queues(cptvf, qlen); cptvf 333 drivers/crypto/cavium/cpt/cptvf_main.c ret = init_pending_queues(cptvf, qlen, nr_queues); cptvf 341 drivers/crypto/cavium/cpt/cptvf_main.c ret = init_worker_threads(cptvf); cptvf 350 drivers/crypto/cavium/cpt/cptvf_main.c cleanup_worker_threads(cptvf); cptvf 351 drivers/crypto/cavium/cpt/cptvf_main.c cleanup_pending_queues(cptvf); cptvf 354 drivers/crypto/cavium/cpt/cptvf_main.c cleanup_command_queues(cptvf); cptvf 359 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_free_irq_affinity(struct cpt_vf *cptvf, int vec) cptvf 361 drivers/crypto/cavium/cpt/cptvf_main.c irq_set_affinity_hint(pci_irq_vector(cptvf->pdev, vec), NULL); cptvf 362 drivers/crypto/cavium/cpt/cptvf_main.c free_cpumask_var(cptvf->affinity_mask[vec]); cptvf 365 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_write_vq_ctl(struct cpt_vf *cptvf, bool val) cptvf 369 drivers/crypto/cavium/cpt/cptvf_main.c vqx_ctl.u = cpt_read_csr64(cptvf->reg_base, CPTX_VQX_CTL(0, 0)); cptvf 371 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_CTL(0, 0), vqx_ctl.u); cptvf 374 drivers/crypto/cavium/cpt/cptvf_main.c void cptvf_write_vq_doorbell(struct cpt_vf *cptvf, u32 val) cptvf 378 drivers/crypto/cavium/cpt/cptvf_main.c vqx_dbell.u = cpt_read_csr64(cptvf->reg_base, cptvf 381 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_DOORBELL(0, 0), cptvf 385 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_write_vq_inprog(struct cpt_vf *cptvf, u8 val) cptvf 389 drivers/crypto/cavium/cpt/cptvf_main.c vqx_inprg.u = cpt_read_csr64(cptvf->reg_base, CPTX_VQX_INPROG(0, 0)); cptvf 391 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_INPROG(0, 0), vqx_inprg.u); cptvf 394 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_write_vq_done_numwait(struct cpt_vf *cptvf, u32 val) cptvf 398 drivers/crypto/cavium/cpt/cptvf_main.c vqx_dwait.u = cpt_read_csr64(cptvf->reg_base, cptvf 401 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_DONE_WAIT(0, 0), cptvf 405 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_write_vq_done_timewait(struct cpt_vf *cptvf, u16 time) cptvf 409 drivers/crypto/cavium/cpt/cptvf_main.c vqx_dwait.u = cpt_read_csr64(cptvf->reg_base, cptvf 412 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_DONE_WAIT(0, 0), cptvf 416 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_enable_swerr_interrupts(struct cpt_vf *cptvf) cptvf 420 drivers/crypto/cavium/cpt/cptvf_main.c vqx_misc_ena.u = cpt_read_csr64(cptvf->reg_base, cptvf 424 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_MISC_ENA_W1S(0, 0), cptvf 428 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_enable_mbox_interrupts(struct cpt_vf *cptvf) cptvf 432 drivers/crypto/cavium/cpt/cptvf_main.c vqx_misc_ena.u = cpt_read_csr64(cptvf->reg_base, cptvf 436 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_MISC_ENA_W1S(0, 0), cptvf 440 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_enable_done_interrupts(struct cpt_vf *cptvf) cptvf 444 drivers/crypto/cavium/cpt/cptvf_main.c vqx_done_ena.u = cpt_read_csr64(cptvf->reg_base, cptvf 448 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_DONE_ENA_W1S(0, 0), cptvf 452 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_clear_dovf_intr(struct cpt_vf *cptvf) cptvf 456 drivers/crypto/cavium/cpt/cptvf_main.c vqx_misc_int.u = cpt_read_csr64(cptvf->reg_base, cptvf 460 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_MISC_INT(0, 0), cptvf 464 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_clear_irde_intr(struct cpt_vf *cptvf) cptvf 468 drivers/crypto/cavium/cpt/cptvf_main.c vqx_misc_int.u = cpt_read_csr64(cptvf->reg_base, cptvf 472 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_MISC_INT(0, 0), cptvf 476 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_clear_nwrp_intr(struct cpt_vf *cptvf) cptvf 480 drivers/crypto/cavium/cpt/cptvf_main.c vqx_misc_int.u = cpt_read_csr64(cptvf->reg_base, cptvf 484 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, cptvf 488 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_clear_mbox_intr(struct cpt_vf *cptvf) cptvf 492 drivers/crypto/cavium/cpt/cptvf_main.c vqx_misc_int.u = cpt_read_csr64(cptvf->reg_base, cptvf 496 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_MISC_INT(0, 0), cptvf 500 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_clear_swerr_intr(struct cpt_vf *cptvf) cptvf 504 drivers/crypto/cavium/cpt/cptvf_main.c vqx_misc_int.u = cpt_read_csr64(cptvf->reg_base, cptvf 508 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_MISC_INT(0, 0), cptvf 512 drivers/crypto/cavium/cpt/cptvf_main.c static u64 cptvf_read_vf_misc_intr_status(struct cpt_vf *cptvf) cptvf 514 drivers/crypto/cavium/cpt/cptvf_main.c return cpt_read_csr64(cptvf->reg_base, CPTX_VQX_MISC_INT(0, 0)); cptvf 519 drivers/crypto/cavium/cpt/cptvf_main.c struct cpt_vf *cptvf = (struct cpt_vf *)cptvf_irq; cptvf 520 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 523 drivers/crypto/cavium/cpt/cptvf_main.c intr = cptvf_read_vf_misc_intr_status(cptvf); cptvf 527 drivers/crypto/cavium/cpt/cptvf_main.c intr, cptvf->vfid); cptvf 528 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_handle_mbox_intr(cptvf); cptvf 529 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_mbox_intr(cptvf); cptvf 531 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_dovf_intr(cptvf); cptvf 533 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_doorbell(cptvf, 0); cptvf 535 drivers/crypto/cavium/cpt/cptvf_main.c intr, cptvf->vfid); cptvf 537 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_irde_intr(cptvf); cptvf 539 drivers/crypto/cavium/cpt/cptvf_main.c intr, cptvf->vfid); cptvf 541 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_nwrp_intr(cptvf); cptvf 543 drivers/crypto/cavium/cpt/cptvf_main.c intr, cptvf->vfid); cptvf 545 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_swerr_intr(cptvf); cptvf 547 drivers/crypto/cavium/cpt/cptvf_main.c intr, cptvf->vfid); cptvf 550 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->vfid); cptvf 556 drivers/crypto/cavium/cpt/cptvf_main.c static inline struct cptvf_wqe *get_cptvf_vq_wqe(struct cpt_vf *cptvf, cptvf 561 drivers/crypto/cavium/cpt/cptvf_main.c if (unlikely(qno >= cptvf->nr_queues)) cptvf 563 drivers/crypto/cavium/cpt/cptvf_main.c nwqe_info = (struct cptvf_wqe_info *)cptvf->wqe_info; cptvf 568 drivers/crypto/cavium/cpt/cptvf_main.c static inline u32 cptvf_read_vq_done_count(struct cpt_vf *cptvf) cptvf 572 drivers/crypto/cavium/cpt/cptvf_main.c vqx_done.u = cpt_read_csr64(cptvf->reg_base, CPTX_VQX_DONE(0, 0)); cptvf 576 drivers/crypto/cavium/cpt/cptvf_main.c static inline void cptvf_write_vq_done_ack(struct cpt_vf *cptvf, cptvf 581 drivers/crypto/cavium/cpt/cptvf_main.c vqx_dack_cnt.u = cpt_read_csr64(cptvf->reg_base, cptvf 584 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_DONE_ACK(0, 0), cptvf 590 drivers/crypto/cavium/cpt/cptvf_main.c struct cpt_vf *cptvf = (struct cpt_vf *)cptvf_irq; cptvf 591 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 593 drivers/crypto/cavium/cpt/cptvf_main.c u32 intr = cptvf_read_vq_done_count(cptvf); cptvf 601 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_done_ack(cptvf, intr); cptvf 602 drivers/crypto/cavium/cpt/cptvf_main.c wqe = get_cptvf_vq_wqe(cptvf, 0); cptvf 605 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->vfid); cptvf 614 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_set_irq_affinity(struct cpt_vf *cptvf, int vec) cptvf 616 drivers/crypto/cavium/cpt/cptvf_main.c struct pci_dev *pdev = cptvf->pdev; cptvf 619 drivers/crypto/cavium/cpt/cptvf_main.c if (!zalloc_cpumask_var(&cptvf->affinity_mask[vec], cptvf 622 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->vfid); cptvf 626 drivers/crypto/cavium/cpt/cptvf_main.c cpu = cptvf->vfid % num_online_cpus(); cptvf 627 drivers/crypto/cavium/cpt/cptvf_main.c cpumask_set_cpu(cpumask_local_spread(cpu, cptvf->node), cptvf 628 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->affinity_mask[vec]); cptvf 630 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->affinity_mask[vec]); cptvf 633 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_write_vq_saddr(struct cpt_vf *cptvf, u64 val) cptvf 638 drivers/crypto/cavium/cpt/cptvf_main.c cpt_write_csr64(cptvf->reg_base, CPTX_VQX_SADDR(0, 0), vqx_saddr.u); cptvf 641 drivers/crypto/cavium/cpt/cptvf_main.c static void cptvf_device_init(struct cpt_vf *cptvf) cptvf 646 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_ctl(cptvf, 0); cptvf 648 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_doorbell(cptvf, 0); cptvf 650 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_inprog(cptvf, 0); cptvf 653 drivers/crypto/cavium/cpt/cptvf_main.c base_addr = (u64)(cptvf->cqinfo.queue[0].qhead->dma_addr); cptvf 654 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_saddr(cptvf, base_addr); cptvf 656 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_done_timewait(cptvf, CPT_TIMER_THOLD); cptvf 657 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_done_numwait(cptvf, 1); cptvf 659 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_ctl(cptvf, 1); cptvf 661 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->flags |= CPT_FLAG_DEVICE_READY; cptvf 667 drivers/crypto/cavium/cpt/cptvf_main.c struct cpt_vf *cptvf; cptvf 670 drivers/crypto/cavium/cpt/cptvf_main.c cptvf = devm_kzalloc(dev, sizeof(*cptvf), GFP_KERNEL); cptvf 671 drivers/crypto/cavium/cpt/cptvf_main.c if (!cptvf) cptvf 674 drivers/crypto/cavium/cpt/cptvf_main.c pci_set_drvdata(pdev, cptvf); cptvf 675 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->pdev = pdev; cptvf 689 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->flags |= CPT_FLAG_VF_DRIVER; cptvf 703 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->reg_base = pcim_iomap(pdev, 0, 0); cptvf 704 drivers/crypto/cavium/cpt/cptvf_main.c if (!cptvf->reg_base) { cptvf 710 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->node = dev_to_node(&pdev->dev); cptvf 721 drivers/crypto/cavium/cpt/cptvf_main.c cptvf); cptvf 728 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_enable_mbox_interrupts(cptvf); cptvf 729 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_enable_swerr_interrupts(cptvf); cptvf 733 drivers/crypto/cavium/cpt/cptvf_main.c err = cptvf_check_pf_ready(cptvf); cptvf 740 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->cqinfo.qchunksize = CPT_CMD_QCHUNK_SIZE; cptvf 741 drivers/crypto/cavium/cpt/cptvf_main.c err = cptvf_sw_init(cptvf, CPT_CMD_QLEN, CPT_NUM_QS_PER_VF); cptvf 747 drivers/crypto/cavium/cpt/cptvf_main.c err = cptvf_send_vq_size_msg(cptvf); cptvf 754 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_device_init(cptvf); cptvf 756 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->vfgrp = 1; cptvf 757 drivers/crypto/cavium/cpt/cptvf_main.c err = cptvf_send_vf_to_grp_msg(cptvf); cptvf 763 drivers/crypto/cavium/cpt/cptvf_main.c cptvf->priority = 1; cptvf 764 drivers/crypto/cavium/cpt/cptvf_main.c err = cptvf_send_vf_priority_msg(cptvf); cptvf 772 drivers/crypto/cavium/cpt/cptvf_main.c cptvf); cptvf 779 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_enable_done_interrupts(cptvf); cptvf 782 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_set_irq_affinity(cptvf, CPT_VF_INT_VEC_E_MISC); cptvf 783 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_set_irq_affinity(cptvf, CPT_VF_INT_VEC_E_DONE); cptvf 785 drivers/crypto/cavium/cpt/cptvf_main.c err = cptvf_send_vf_up(cptvf); cptvf 790 drivers/crypto/cavium/cpt/cptvf_main.c err = cvm_crypto_init(cptvf); cptvf 798 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_free_irq_affinity(cptvf, CPT_VF_INT_VEC_E_DONE); cptvf 799 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_free_irq_affinity(cptvf, CPT_VF_INT_VEC_E_MISC); cptvf 801 drivers/crypto/cavium/cpt/cptvf_main.c free_irq(pci_irq_vector(pdev, CPT_VF_INT_VEC_E_MISC), cptvf); cptvf 803 drivers/crypto/cavium/cpt/cptvf_main.c pci_free_irq_vectors(cptvf->pdev); cptvf 815 drivers/crypto/cavium/cpt/cptvf_main.c struct cpt_vf *cptvf = pci_get_drvdata(pdev); cptvf 817 drivers/crypto/cavium/cpt/cptvf_main.c if (!cptvf) { cptvf 823 drivers/crypto/cavium/cpt/cptvf_main.c if (cptvf_send_vf_down(cptvf)) { cptvf 826 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_free_irq_affinity(cptvf, CPT_VF_INT_VEC_E_DONE); cptvf 827 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_free_irq_affinity(cptvf, CPT_VF_INT_VEC_E_MISC); cptvf 828 drivers/crypto/cavium/cpt/cptvf_main.c free_irq(pci_irq_vector(pdev, CPT_VF_INT_VEC_E_DONE), cptvf); cptvf 829 drivers/crypto/cavium/cpt/cptvf_main.c free_irq(pci_irq_vector(pdev, CPT_VF_INT_VEC_E_MISC), cptvf); cptvf 830 drivers/crypto/cavium/cpt/cptvf_main.c pci_free_irq_vectors(cptvf->pdev); cptvf 831 drivers/crypto/cavium/cpt/cptvf_main.c cptvf_sw_cleanup(cptvf); cptvf 8 drivers/crypto/cavium/cpt/cptvf_mbox.c static void cptvf_send_msg_to_pf(struct cpt_vf *cptvf, struct cpt_mbox *mbx) cptvf 11 drivers/crypto/cavium/cpt/cptvf_mbox.c cpt_write_csr64(cptvf->reg_base, CPTX_VFX_PF_MBOXX(0, 0, 0), cptvf 13 drivers/crypto/cavium/cpt/cptvf_mbox.c cpt_write_csr64(cptvf->reg_base, CPTX_VFX_PF_MBOXX(0, 0, 1), cptvf 18 drivers/crypto/cavium/cpt/cptvf_mbox.c void cptvf_handle_mbox_intr(struct cpt_vf *cptvf) cptvf 26 drivers/crypto/cavium/cpt/cptvf_mbox.c mbx.msg = cpt_read_csr64(cptvf->reg_base, CPTX_VFX_PF_MBOXX(0, 0, 0)); cptvf 27 drivers/crypto/cavium/cpt/cptvf_mbox.c mbx.data = cpt_read_csr64(cptvf->reg_base, CPTX_VFX_PF_MBOXX(0, 0, 1)); cptvf 28 drivers/crypto/cavium/cpt/cptvf_mbox.c dev_dbg(&cptvf->pdev->dev, "%s: Mailbox msg 0x%llx from PF\n", cptvf 33 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf->pf_acked = true; cptvf 34 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf->vfid = mbx.data; cptvf 35 drivers/crypto/cavium/cpt/cptvf_mbox.c dev_dbg(&cptvf->pdev->dev, "Received VFID %d\n", cptvf->vfid); cptvf 39 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf->pf_acked = true; cptvf 40 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf->vftype = mbx.data; cptvf 41 drivers/crypto/cavium/cpt/cptvf_mbox.c dev_dbg(&cptvf->pdev->dev, "VF %d type %s group %d\n", cptvf 42 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf->vfid, ((mbx.data == SE_TYPES) ? "SE" : "AE"), cptvf 43 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf->vfgrp); cptvf 46 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf->pf_acked = true; cptvf 49 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf->pf_nacked = true; cptvf 52 drivers/crypto/cavium/cpt/cptvf_mbox.c dev_err(&cptvf->pdev->dev, "Invalid msg from PF, msg 0x%llx\n", cptvf 58 drivers/crypto/cavium/cpt/cptvf_mbox.c static int cptvf_send_msg_to_pf_timeout(struct cpt_vf *cptvf, cptvf 64 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf->pf_acked = false; cptvf 65 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf->pf_nacked = false; cptvf 66 drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf_send_msg_to_pf(cptvf, mbx); cptvf 68 drivers/crypto/cavium/cpt/cptvf_mbox.c while (!cptvf->pf_acked) { cptvf 69 drivers/crypto/cavium/cpt/cptvf_mbox.c if (cptvf->pf_nacked) cptvf 72 drivers/crypto/cavium/cpt/cptvf_mbox.c if (cptvf->pf_acked) cptvf 76 drivers/crypto/cavium/cpt/cptvf_mbox.c dev_err(&cptvf->pdev->dev, "PF didn't ack to mbox msg %llx from VF%u\n", cptvf 77 drivers/crypto/cavium/cpt/cptvf_mbox.c (mbx->msg & 0xFF), cptvf->vfid); cptvf 89 drivers/crypto/cavium/cpt/cptvf_mbox.c int cptvf_check_pf_ready(struct cpt_vf *cptvf) cptvf 91 drivers/crypto/cavium/cpt/cptvf_mbox.c struct pci_dev *pdev = cptvf->pdev; cptvf 95 drivers/crypto/cavium/cpt/cptvf_mbox.c if (cptvf_send_msg_to_pf_timeout(cptvf, &mbx)) { cptvf 107 drivers/crypto/cavium/cpt/cptvf_mbox.c int cptvf_send_vq_size_msg(struct cpt_vf *cptvf) cptvf 109 drivers/crypto/cavium/cpt/cptvf_mbox.c struct pci_dev *pdev = cptvf->pdev; cptvf 113 drivers/crypto/cavium/cpt/cptvf_mbox.c mbx.data = cptvf->qsize; cptvf 114 drivers/crypto/cavium/cpt/cptvf_mbox.c if (cptvf_send_msg_to_pf_timeout(cptvf, &mbx)) { cptvf 125 drivers/crypto/cavium/cpt/cptvf_mbox.c int cptvf_send_vf_to_grp_msg(struct cpt_vf *cptvf) cptvf 127 drivers/crypto/cavium/cpt/cptvf_mbox.c struct pci_dev *pdev = cptvf->pdev; cptvf 132 drivers/crypto/cavium/cpt/cptvf_mbox.c mbx.data = cptvf->vfgrp; cptvf 133 drivers/crypto/cavium/cpt/cptvf_mbox.c if (cptvf_send_msg_to_pf_timeout(cptvf, &mbx)) { cptvf 144 drivers/crypto/cavium/cpt/cptvf_mbox.c int cptvf_send_vf_priority_msg(struct cpt_vf *cptvf) cptvf 146 drivers/crypto/cavium/cpt/cptvf_mbox.c struct pci_dev *pdev = cptvf->pdev; cptvf 151 drivers/crypto/cavium/cpt/cptvf_mbox.c mbx.data = cptvf->priority; cptvf 152 drivers/crypto/cavium/cpt/cptvf_mbox.c if (cptvf_send_msg_to_pf_timeout(cptvf, &mbx)) { cptvf 162 drivers/crypto/cavium/cpt/cptvf_mbox.c int cptvf_send_vf_up(struct cpt_vf *cptvf) cptvf 164 drivers/crypto/cavium/cpt/cptvf_mbox.c struct pci_dev *pdev = cptvf->pdev; cptvf 168 drivers/crypto/cavium/cpt/cptvf_mbox.c if (cptvf_send_msg_to_pf_timeout(cptvf, &mbx)) { cptvf 179 drivers/crypto/cavium/cpt/cptvf_mbox.c int cptvf_send_vf_down(struct cpt_vf *cptvf) cptvf 181 drivers/crypto/cavium/cpt/cptvf_mbox.c struct pci_dev *pdev = cptvf->pdev; cptvf 185 drivers/crypto/cavium/cpt/cptvf_mbox.c if (cptvf_send_msg_to_pf_timeout(cptvf, &mbx)) { cptvf 43 drivers/crypto/cavium/cpt/cptvf_reqmanager.c static int setup_sgio_components(struct cpt_vf *cptvf, struct buf_ptr *list, cptvf 49 drivers/crypto/cavium/cpt/cptvf_reqmanager.c struct pci_dev *pdev = cptvf->pdev; cptvf 120 drivers/crypto/cavium/cpt/cptvf_reqmanager.c static inline int setup_sgio_list(struct cpt_vf *cptvf, cptvf 126 drivers/crypto/cavium/cpt/cptvf_reqmanager.c struct pci_dev *pdev = cptvf->pdev; cptvf 142 drivers/crypto/cavium/cpt/cptvf_reqmanager.c ret = setup_sgio_components(cptvf, req->in, cptvf 159 drivers/crypto/cavium/cpt/cptvf_reqmanager.c ret = setup_sgio_components(cptvf, req->out, cptvf 223 drivers/crypto/cavium/cpt/cptvf_reqmanager.c static int send_cpt_command(struct cpt_vf *cptvf, union cpt_inst_s *cmd, cptvf 226 drivers/crypto/cavium/cpt/cptvf_reqmanager.c struct pci_dev *pdev = cptvf->pdev; cptvf 233 drivers/crypto/cavium/cpt/cptvf_reqmanager.c if (unlikely(qno >= cptvf->nr_queues)) { cptvf 235 drivers/crypto/cavium/cpt/cptvf_reqmanager.c qno, cptvf->nr_queues); cptvf 239 drivers/crypto/cavium/cpt/cptvf_reqmanager.c qinfo = &cptvf->cqinfo; cptvf 263 drivers/crypto/cavium/cpt/cptvf_reqmanager.c cptvf_write_vq_doorbell(cptvf, 1); cptvf 270 drivers/crypto/cavium/cpt/cptvf_reqmanager.c static void do_request_cleanup(struct cpt_vf *cptvf, cptvf 274 drivers/crypto/cavium/cpt/cptvf_reqmanager.c struct pci_dev *pdev = cptvf->pdev; cptvf 316 drivers/crypto/cavium/cpt/cptvf_reqmanager.c static void do_post_process(struct cpt_vf *cptvf, struct cpt_info_buffer *info) cptvf 318 drivers/crypto/cavium/cpt/cptvf_reqmanager.c struct pci_dev *pdev = cptvf->pdev; cptvf 325 drivers/crypto/cavium/cpt/cptvf_reqmanager.c do_request_cleanup(cptvf, info); cptvf 328 drivers/crypto/cavium/cpt/cptvf_reqmanager.c static inline void process_pending_queue(struct cpt_vf *cptvf, cptvf 332 drivers/crypto/cavium/cpt/cptvf_reqmanager.c struct pci_dev *pdev = cptvf->pdev; cptvf 367 drivers/crypto/cavium/cpt/cptvf_reqmanager.c do_request_cleanup(cptvf, info); cptvf 381 drivers/crypto/cavium/cpt/cptvf_reqmanager.c do_request_cleanup(cptvf, info); cptvf 401 drivers/crypto/cavium/cpt/cptvf_reqmanager.c do_post_process(info->cptvf, info); cptvf 410 drivers/crypto/cavium/cpt/cptvf_reqmanager.c int process_request(struct cpt_vf *cptvf, struct cpt_request_info *req) cptvf 419 drivers/crypto/cavium/cpt/cptvf_reqmanager.c struct pci_dev *pdev = cptvf->pdev; cptvf 433 drivers/crypto/cavium/cpt/cptvf_reqmanager.c info->cptvf = cptvf; cptvf 435 drivers/crypto/cavium/cpt/cptvf_reqmanager.c ret = setup_sgio_list(cptvf, info, req); cptvf 482 drivers/crypto/cavium/cpt/cptvf_reqmanager.c pqueue = &cptvf->pqinfo.queue[queue]; cptvf 486 drivers/crypto/cavium/cpt/cptvf_reqmanager.c process_pending_queue(cptvf, &cptvf->pqinfo, queue); cptvf 491 drivers/crypto/cavium/cpt/cptvf_reqmanager.c pentry = get_free_pending_entry(pqueue, cptvf->pqinfo.qlen); cptvf 495 drivers/crypto/cavium/cpt/cptvf_reqmanager.c process_pending_queue(cptvf, &cptvf->pqinfo, queue); cptvf 530 drivers/crypto/cavium/cpt/cptvf_reqmanager.c ret = send_cpt_command(cptvf, &cptinst, queue); cptvf 542 drivers/crypto/cavium/cpt/cptvf_reqmanager.c do_request_cleanup(cptvf, info); cptvf 547 drivers/crypto/cavium/cpt/cptvf_reqmanager.c void vq_post_process(struct cpt_vf *cptvf, u32 qno) cptvf 549 drivers/crypto/cavium/cpt/cptvf_reqmanager.c struct pci_dev *pdev = cptvf->pdev; cptvf 551 drivers/crypto/cavium/cpt/cptvf_reqmanager.c if (unlikely(qno > cptvf->nr_queues)) { cptvf 557 drivers/crypto/cavium/cpt/cptvf_reqmanager.c process_pending_queue(cptvf, &cptvf->pqinfo, qno); cptvf 562 drivers/crypto/cavium/cpt/cptvf_reqmanager.c struct cpt_vf *cptvf = (struct cpt_vf *)vfdev; cptvf 563 drivers/crypto/cavium/cpt/cptvf_reqmanager.c struct pci_dev *pdev = cptvf->pdev; cptvf 565 drivers/crypto/cavium/cpt/cptvf_reqmanager.c if (!cpt_device_ready(cptvf)) { cptvf 570 drivers/crypto/cavium/cpt/cptvf_reqmanager.c if ((cptvf->vftype == SE_TYPES) && (!req->ctrl.s.se_req)) { cptvf 572 drivers/crypto/cavium/cpt/cptvf_reqmanager.c cptvf->vfid); cptvf 574 drivers/crypto/cavium/cpt/cptvf_reqmanager.c } else if ((cptvf->vftype == AE_TYPES) && (req->ctrl.s.se_req)) { cptvf 576 drivers/crypto/cavium/cpt/cptvf_reqmanager.c cptvf->vfid); cptvf 580 drivers/crypto/cavium/cpt/cptvf_reqmanager.c return process_request(cptvf, req); cptvf 89 drivers/crypto/cavium/cpt/request_manager.h struct cpt_vf *cptvf; cptvf 142 drivers/crypto/cavium/cpt/request_manager.h void vq_post_process(struct cpt_vf *cptvf, u32 qno); cptvf 143 drivers/crypto/cavium/cpt/request_manager.h int process_request(struct cpt_vf *cptvf, struct cpt_request_info *req);