cpha               38 drivers/spi/spi-cavium.c 	bool cpha, cpol;
cpha               45 drivers/spi/spi-cavium.c 	cpha = mode & SPI_CPHA;
cpha               56 drivers/spi/spi-cavium.c 	mpi_cfg.s.idlelo = cpha != cpol;
cpha               57 drivers/spi/spi-cavium.c 	mpi_cfg.s.cslate = cpha ? 1 : 0;
cpha              203 drivers/spi/spi-geni-qcom.c 	u32 loopback_cfg, cpol, cpha, demux_output_inv;
cpha              209 drivers/spi/spi-geni-qcom.c 	cpha = readl(se->base + SE_SPI_CPHA);
cpha              213 drivers/spi/spi-geni-qcom.c 	cpha &= ~CPHA;
cpha              222 drivers/spi/spi-geni-qcom.c 		cpha |= CPHA;
cpha              243 drivers/spi/spi-geni-qcom.c 	writel(cpha, se->base + SE_SPI_CPHA);
cpha              195 drivers/spi/spi-mt65xx.c 	u16 cpha, cpol;
cpha              201 drivers/spi/spi-mt65xx.c 	cpha = spi->mode & SPI_CPHA ? 1 : 0;
cpha              205 drivers/spi/spi-mt65xx.c 	if (cpha)
cpha              347 drivers/spi/spi-sh-msiof.c 				      u32 cpol, u32 cpha,
cpha              381 drivers/spi/spi-sh-msiof.c 	edge = cpol ^ !cpha;
cpha              117 drivers/spi/spi-slave-mt27xx.c 	bool cpha, cpol;
cpha              120 drivers/spi/spi-slave-mt27xx.c 	cpha = spi->mode & SPI_CPHA ? 1 : 0;
cpha              124 drivers/spi/spi-slave-mt27xx.c 	if (cpha)
cpha              207 drivers/spi/spi-stm32.c 	const struct stm32_spi_reg cpha;
cpha              326 drivers/spi/spi-stm32.c 	.cpha = { STM32F4_SPI_CR1, STM32F4_SPI_CR1_CPHA },
cpha              344 drivers/spi/spi-stm32.c 	.cpha = { STM32H7_SPI_CFG2, STM32H7_SPI_CFG2_CPHA },
cpha             1022 drivers/spi/spi-stm32.c 		setb |= spi->cfg->regs->cpha.mask;
cpha             1024 drivers/spi/spi-stm32.c 		clrb |= spi->cfg->regs->cpha.mask;