cp_m2p0          7034 drivers/gpu/drm/radeon/cik.c 	u32 cp_m2p0, cp_m2p1, cp_m2p2, cp_m2p3;
cp_m2p0          7070 drivers/gpu/drm/radeon/cik.c 	cp_m2p0 = RREG32(CP_ME2_PIPE0_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
cp_m2p0          7104 drivers/gpu/drm/radeon/cik.c 				cp_m2p0 |= TIME_STAMP_INT_ENABLE;
cp_m2p0          7147 drivers/gpu/drm/radeon/cik.c 				cp_m2p0 |= TIME_STAMP_INT_ENABLE;
cp_m2p0          7241 drivers/gpu/drm/radeon/cik.c 	WREG32(CP_ME2_PIPE0_INT_CNTL, cp_m2p0);