cp_int_cntl2     4495 drivers/gpu/drm/radeon/evergreen.c 	u32 cp_int_cntl1 = 0, cp_int_cntl2 = 0;
cp_int_cntl2     4533 drivers/gpu/drm/radeon/evergreen.c 			cp_int_cntl2 |= TIME_STAMP_INT_ENABLE;
cp_int_cntl2     4564 drivers/gpu/drm/radeon/evergreen.c 		cayman_cp_int_cntl_setup(rdev, 2, cp_int_cntl2);
cp_int_cntl2     6054 drivers/gpu/drm/radeon/si.c 	u32 cp_int_cntl1 = 0, cp_int_cntl2 = 0;
cp_int_cntl2     6091 drivers/gpu/drm/radeon/si.c 		cp_int_cntl2 |= TIME_STAMP_INT_ENABLE;
cp_int_cntl2     6105 drivers/gpu/drm/radeon/si.c 	WREG32(CP_INT_CNTL_RING2, cp_int_cntl2);