cp_hqd_pq_base_hi 3324 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); cp_hqd_pq_base_hi 3446 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mqd->cp_hqd_pq_base_hi); cp_hqd_pq_base_hi 2846 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c u32 cp_hqd_pq_base_hi; cp_hqd_pq_base_hi 2964 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); cp_hqd_pq_base_hi 4506 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); cp_hqd_pq_base_hi 3485 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); cp_hqd_pq_base_hi 3606 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mqd->cp_hqd_pq_base_hi); cp_hqd_pq_base_hi 207 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); cp_hqd_pq_base_hi 330 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); cp_hqd_pq_base_hi 188 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); cp_hqd_pq_base_hi 206 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); cp_hqd_pq_base_hi 184 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); cp_hqd_pq_base_hi 88 drivers/gpu/drm/amd/include/cik_structs.h uint32_t cp_hqd_pq_base_hi; cp_hqd_pq_base_hi 814 drivers/gpu/drm/amd/include/v10_structs.h uint32_t cp_hqd_pq_base_hi; cp_hqd_pq_base_hi 297 drivers/gpu/drm/amd/include/v9_structs.h uint32_t cp_hqd_pq_base_hi; cp_hqd_pq_base_hi 297 drivers/gpu/drm/amd/include/vi_structs.h uint32_t cp_hqd_pq_base_hi; cp_hqd_pq_base_hi 4457 drivers/gpu/drm/radeon/cik.c u32 cp_hqd_pq_base_hi; cp_hqd_pq_base_hi 4667 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); cp_hqd_pq_base_hi 4669 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_PQ_BASE_HI, mqd->queue_state.cp_hqd_pq_base_hi);