cp110              41 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		cp110->base.ctx->logger
cp110              43 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	(reg + cp110->offsets.dcp_offset)
cp110              45 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	(reg + cp110->offsets.dmif_offset)
cp110              79 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
cp110              81 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	cp110->offsets = reg_offsets[crtc_inst];
cp110             114 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	struct dce110_compressor *cp110,
cp110             122 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		value = dm_read_reg(cp110->base.ctx, addr);
cp110             192 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
cp110             237 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 		wait_for_fbc_state_changed(cp110, true);
cp110             243 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
cp110             258 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 			wait_for_fbc_state_changed(cp110, false);
cp110             301 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
cp110             307 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	cp110->offsets = reg_offsets[params->inst];
cp110             399 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	struct dce110_compressor *cp110 =
cp110             402 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	if (!cp110)
cp110             405 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	dce110_compressor_construct(cp110, ctx);
cp110             406 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	return &cp110->base;
cp110              45 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.h void dce110_compressor_construct(struct dce110_compressor *cp110,
cp110              40 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		cp110->base.ctx->logger
cp110              42 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	(reg + cp110->offsets.dcp_offset)
cp110              44 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	(reg + cp110->offsets.dmif_offset)
cp110             101 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c static uint32_t lpt_size_alignment(struct dce112_compressor *cp110)
cp110             104 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	return cp110->base.raw_size * cp110->base.banks_num *
cp110             105 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		cp110->base.dram_channels_num;
cp110             108 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c static uint32_t lpt_memory_control_config(struct dce112_compressor *cp110,
cp110             112 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	if (cp110->base.options.bits.LPT_MC_CONFIG == 1) {
cp110             120 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		switch (cp110->base.dram_channels_num) {
cp110             151 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		switch (cp110->base.banks_num) {
cp110             198 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		switch (cp110->base.channel_interleave_size) {
cp110             234 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		switch (cp110->base.raw_size) {
cp110             272 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	struct dce112_compressor *cp110,
cp110             276 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	if (cp110->base.embedded_panel_h_size != 0 &&
cp110             277 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		cp110->base.embedded_panel_v_size != 0 &&
cp110             279 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		(cp110->base.embedded_panel_h_size *
cp110             280 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 			cp110->base.embedded_panel_v_size)))
cp110             287 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	struct dce112_compressor *cp110,
cp110             294 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	struct dce112_compressor *cp110,
cp110             302 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		value = dm_read_reg(cp110->base.ctx, addr);
cp110             370 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
cp110             376 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 			cp110,
cp110             405 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		cp110->offsets = reg_offsets[params->inst];
cp110             413 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		wait_for_fbc_state_changed(cp110, true);
cp110             419 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
cp110             438 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		wait_for_fbc_state_changed(cp110, false);
cp110             486 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
cp110             501 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		uint32_t lpt_alignment = lpt_size_alignment(cp110);
cp110             520 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		cp110,
cp110             545 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
cp110             599 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
cp110             660 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	struct dce112_compressor *cp110 = TO_DCE112_COMPRESSOR(compressor);
cp110             696 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	lpt_control = lpt_memory_control_config(cp110, lpt_control);
cp110             704 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	lpt_alignment = lpt_size_alignment(cp110);
cp110             707 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 			cp110,
cp110             836 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	struct dce112_compressor *cp110 =
cp110             839 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	if (!cp110)
cp110             842 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	dce112_compressor_construct(cp110, ctx);
cp110             843 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	return &cp110->base;
cp110              45 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.h void dce112_compressor_construct(struct dce112_compressor *cp110,