cp0_regs 59 drivers/soc/bcm/brcmstb/pm/pm-mips.c u32 cp0_regs[MAX_CP0_REGS]; cp0_regs 94 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[CONTEXT] = read_c0_context(); cp0_regs 95 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[USER_LOCAL] = read_c0_userlocal(); cp0_regs 96 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[PGMK] = read_c0_pagemask(); cp0_regs 97 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[HWRENA] = read_c0_cache(); cp0_regs 98 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[COMPARE] = read_c0_compare(); cp0_regs 99 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[STATUS] = read_c0_status(); cp0_regs 102 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[CONFIG] = read_c0_brcm_config(); cp0_regs 103 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[MODE] = read_c0_brcm_mode(); cp0_regs 104 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[EDSP] = read_c0_brcm_edsp(); cp0_regs 105 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[BOOT_VEC] = read_c0_brcm_bootvec(); cp0_regs 106 drivers/soc/bcm/brcmstb/pm/pm-mips.c ctx->cp0_regs[EBASE] = read_c0_ebase(); cp0_regs 117 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_context(ctx->cp0_regs[CONTEXT]); cp0_regs 118 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_userlocal(ctx->cp0_regs[USER_LOCAL]); cp0_regs 119 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_pagemask(ctx->cp0_regs[PGMK]); cp0_regs 120 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_cache(ctx->cp0_regs[HWRENA]); cp0_regs 121 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_compare(ctx->cp0_regs[COMPARE]); cp0_regs 122 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_status(ctx->cp0_regs[STATUS]); cp0_regs 125 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_brcm_config(ctx->cp0_regs[CONFIG]); cp0_regs 126 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_brcm_mode(ctx->cp0_regs[MODE]); cp0_regs 127 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_brcm_edsp(ctx->cp0_regs[EDSP]); cp0_regs 128 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_brcm_bootvec(ctx->cp0_regs[BOOT_VEC]); cp0_regs 129 drivers/soc/bcm/brcmstb/pm/pm-mips.c write_c0_ebase(ctx->cp0_regs[EBASE]);