counter_config 38 arch/x86/oprofile/nmi_int.c struct op_counter_config counter_config[OP_MAX_COUNTER]; counter_config 43 arch/x86/oprofile/nmi_int.c struct op_counter_config *counter_config) counter_config 46 arch/x86/oprofile/nmi_int.c u16 event = (u16)counter_config->event; counter_config 49 arch/x86/oprofile/nmi_int.c val |= counter_config->user ? ARCH_PERFMON_EVENTSEL_USR : 0; counter_config 50 arch/x86/oprofile/nmi_int.c val |= counter_config->kernel ? ARCH_PERFMON_EVENTSEL_OS : 0; counter_config 51 arch/x86/oprofile/nmi_int.c val |= (counter_config->unit_mask & 0xFF) << 8; counter_config 52 arch/x86/oprofile/nmi_int.c counter_config->extra &= (ARCH_PERFMON_EVENTSEL_INV | counter_config 55 arch/x86/oprofile/nmi_int.c val |= counter_config->extra; counter_config 190 arch/x86/oprofile/nmi_int.c if (counter_config[i].enabled) { counter_config 191 arch/x86/oprofile/nmi_int.c multiplex[i].saved = -(u64)counter_config[i].count; counter_config 237 arch/x86/oprofile/nmi_int.c if ((si >= model->num_virt_counters) || (counter_config[si].count == 0)) counter_config 256 arch/x86/oprofile/nmi_int.c return counter_config[model->num_counters].count ? 0 : -EINVAL; counter_config 431 arch/x86/oprofile/nmi_int.c oprofilefs_create_ulong(dir, "enabled", &counter_config[i].enabled); counter_config 432 arch/x86/oprofile/nmi_int.c oprofilefs_create_ulong(dir, "event", &counter_config[i].event); counter_config 433 arch/x86/oprofile/nmi_int.c oprofilefs_create_ulong(dir, "count", &counter_config[i].count); counter_config 434 arch/x86/oprofile/nmi_int.c oprofilefs_create_ulong(dir, "unit_mask", &counter_config[i].unit_mask); counter_config 435 arch/x86/oprofile/nmi_int.c oprofilefs_create_ulong(dir, "kernel", &counter_config[i].kernel); counter_config 436 arch/x86/oprofile/nmi_int.c oprofilefs_create_ulong(dir, "user", &counter_config[i].user); counter_config 437 arch/x86/oprofile/nmi_int.c oprofilefs_create_ulong(dir, "extra", &counter_config[i].extra); counter_config 28 arch/x86/oprofile/op_counter.h extern struct op_counter_config counter_config[]; counter_config 281 arch/x86/oprofile/op_model_amd.c val |= op_x86_get_ctrl(model, &counter_config[virt]); counter_config 323 arch/x86/oprofile/op_model_amd.c if (!counter_config[i].enabled) counter_config 341 arch/x86/oprofile/op_model_amd.c if (counter_config[i].enabled counter_config 343 arch/x86/oprofile/op_model_amd.c reset_value[i] = counter_config[i].count; counter_config 376 arch/x86/oprofile/op_model_amd.c val |= op_x86_get_ctrl(model, &counter_config[virt]); counter_config 491 arch/x86/oprofile/op_model_p4.c if (!counter_config[i].enabled) counter_config 521 arch/x86/oprofile/op_model_p4.c if (counter_config[ctr].event <= 0 || counter_config[ctr].event > NUM_EVENTS) { counter_config 524 arch/x86/oprofile/op_model_p4.c counter_config[ctr].event); counter_config 528 arch/x86/oprofile/op_model_p4.c ev = &(p4_events[counter_config[ctr].event - 1]); counter_config 537 arch/x86/oprofile/op_model_p4.c ESCR_SET_USR_0(escr, counter_config[ctr].user); counter_config 538 arch/x86/oprofile/op_model_p4.c ESCR_SET_OS_0(escr, counter_config[ctr].kernel); counter_config 540 arch/x86/oprofile/op_model_p4.c ESCR_SET_USR_1(escr, counter_config[ctr].user); counter_config 541 arch/x86/oprofile/op_model_p4.c ESCR_SET_OS_1(escr, counter_config[ctr].kernel); counter_config 544 arch/x86/oprofile/op_model_p4.c ESCR_SET_EVENT_MASK(escr, counter_config[ctr].unit_mask); counter_config 565 arch/x86/oprofile/op_model_p4.c counter_config[ctr].event, stag, ctr); counter_config 603 arch/x86/oprofile/op_model_p4.c if (counter_config[i].enabled && msrs->controls[i].addr) { counter_config 604 arch/x86/oprofile/op_model_p4.c reset_value[i] = counter_config[i].count; counter_config 607 arch/x86/oprofile/op_model_p4.c -(u64)counter_config[i].count); counter_config 61 arch/x86/oprofile/op_model_ppro.c if (!counter_config[i].enabled) counter_config 113 arch/x86/oprofile/op_model_ppro.c if (counter_config[i].enabled && msrs->counters[i].addr) { counter_config 114 arch/x86/oprofile/op_model_ppro.c reset_value[i] = counter_config[i].count; counter_config 118 arch/x86/oprofile/op_model_ppro.c val |= op_x86_get_ctrl(model, &counter_config[i]); counter_config 80 arch/x86/oprofile/op_x86_model.h struct op_counter_config *counter_config); counter_config 29 drivers/oprofile/oprofile_perf.c static struct op_counter_config *counter_config; counter_config 65 drivers/oprofile/oprofile_perf.c attr = &counter_config[i].attr; counter_config 69 drivers/oprofile/oprofile_perf.c attr->config = counter_config[i].event; counter_config 70 drivers/oprofile/oprofile_perf.c attr->sample_period = counter_config[i].count; counter_config 79 drivers/oprofile/oprofile_perf.c if (!counter_config[event].enabled || per_cpu(perf_events, cpu)[event]) counter_config 82 drivers/oprofile/oprofile_perf.c pevent = perf_event_create_kernel_counter(&counter_config[event].attr, counter_config 152 drivers/oprofile/oprofile_perf.c oprofilefs_create_ulong(dir, "enabled", &counter_config[i].enabled); counter_config 153 drivers/oprofile/oprofile_perf.c oprofilefs_create_ulong(dir, "event", &counter_config[i].event); counter_config 154 drivers/oprofile/oprofile_perf.c oprofilefs_create_ulong(dir, "count", &counter_config[i].count); counter_config 155 drivers/oprofile/oprofile_perf.c oprofilefs_create_ulong(dir, "unit_mask", &counter_config[i].unit_mask); counter_config 156 drivers/oprofile/oprofile_perf.c oprofilefs_create_ulong(dir, "kernel", &counter_config[i].kernel); counter_config 157 drivers/oprofile/oprofile_perf.c oprofilefs_create_ulong(dir, "user", &counter_config[i].user); counter_config 270 drivers/oprofile/oprofile_perf.c kfree(counter_config); counter_config 289 drivers/oprofile/oprofile_perf.c counter_config = kcalloc(num_counters, counter_config 292 drivers/oprofile/oprofile_perf.c if (!counter_config) {