coreclk            91 arch/c6x/kernel/setup.c 	struct clk *coreclk = clk_get_sys(NULL, "core");
coreclk            99 arch/c6x/kernel/setup.c 	if (!IS_ERR(coreclk))
coreclk           100 arch/c6x/kernel/setup.c 		c6x_core_freq = clk_get_rate(coreclk);
coreclk            89 drivers/clk/clk-qoriq.c 	struct clk *sysclk, *coreclk;
coreclk          1152 drivers/clk/clk-qoriq.c 	if (cg->coreclk && idx != PLATFORM_PLL) {
coreclk          1153 drivers/clk/clk-qoriq.c 		if (IS_ERR(cg->coreclk))
coreclk          1362 drivers/clk/clk-qoriq.c 		clk = cg->coreclk;
coreclk          1477 drivers/clk/clk-qoriq.c 	clockgen.coreclk = create_coreclk("cg-coreclk");
coreclk          7745 drivers/gpu/drm/i915/display/intel_display.c 	u32 coreclk, reg_val;
coreclk          7826 drivers/gpu/drm/i915/display/intel_display.c 	coreclk = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW7(pipe));
coreclk          7827 drivers/gpu/drm/i915/display/intel_display.c 	coreclk = (coreclk & 0x0000ff00) | 0x01c00000;
coreclk          7829 drivers/gpu/drm/i915/display/intel_display.c 		coreclk |= 0x01000000;
coreclk          7830 drivers/gpu/drm/i915/display/intel_display.c 	vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW7(pipe), coreclk);
coreclk           111 drivers/soc/xilinx/xlnx_vcu.c 	u32 coreclk;
coreclk           296 drivers/soc/xilinx/xlnx_vcu.c 	u32 refclk, coreclk, mcuclk, inte, deci;
coreclk           305 drivers/soc/xilinx/xlnx_vcu.c 	coreclk = xvcu_read(xvcu->logicore_reg_ba, VCU_CORE_CLK) * MHZ;
coreclk           307 drivers/soc/xilinx/xlnx_vcu.c 	if (!mcuclk || !coreclk) {
coreclk           314 drivers/soc/xilinx/xlnx_vcu.c 	dev_dbg(xvcu->dev, "Core clock from logicoreIP is %uHz\n", coreclk);
coreclk           351 drivers/soc/xilinx/xlnx_vcu.c 			mod = pll_clk % coreclk;
coreclk           353 drivers/soc/xilinx/xlnx_vcu.c 				divisor_core = pll_clk / coreclk;
coreclk           354 drivers/soc/xilinx/xlnx_vcu.c 			} else if (coreclk - mod < LIMIT) {
coreclk           355 drivers/soc/xilinx/xlnx_vcu.c 				divisor_core = pll_clk / coreclk;
coreclk           377 drivers/soc/xilinx/xlnx_vcu.c 	xvcu->coreclk = pll_clk / divisor_core;
coreclk           380 drivers/soc/xilinx/xlnx_vcu.c 	dev_dbg(xvcu->dev, "Actual Core clock freq is %uHz\n", xvcu->coreclk);
coreclk            55 sound/soc/fsl/fsl_esai.c 	struct clk *coreclk;
coreclk           953 sound/soc/fsl/fsl_esai.c 	esai_priv->coreclk = devm_clk_get(&pdev->dev, "core");
coreclk           954 sound/soc/fsl/fsl_esai.c 	if (IS_ERR(esai_priv->coreclk)) {
coreclk           956 sound/soc/fsl/fsl_esai.c 				PTR_ERR(esai_priv->coreclk));
coreclk           957 sound/soc/fsl/fsl_esai.c 		return PTR_ERR(esai_priv->coreclk);
coreclk          1079 sound/soc/fsl/fsl_esai.c 	ret = clk_prepare_enable(esai->coreclk);
coreclk          1116 sound/soc/fsl/fsl_esai.c 	clk_disable_unprepare(esai->coreclk);
coreclk          1133 sound/soc/fsl/fsl_esai.c 	clk_disable_unprepare(esai->coreclk);
coreclk           104 sound/soc/fsl/fsl_spdif.c 	struct clk *coreclk;
coreclk           470 sound/soc/fsl/fsl_spdif.c 		ret = clk_prepare_enable(spdif_priv->coreclk);
coreclk           528 sound/soc/fsl/fsl_spdif.c 	clk_disable_unprepare(spdif_priv->coreclk);
coreclk           563 sound/soc/fsl/fsl_spdif.c 		clk_disable_unprepare(spdif_priv->coreclk);
coreclk          1269 sound/soc/fsl/fsl_spdif.c 	spdif_priv->coreclk = devm_clk_get(&pdev->dev, "core");
coreclk          1270 sound/soc/fsl/fsl_spdif.c 	if (IS_ERR(spdif_priv->coreclk)) {
coreclk          1272 sound/soc/fsl/fsl_spdif.c 		return PTR_ERR(spdif_priv->coreclk);